SP26LV432
High-Speed, Low-Power Quad RS-422
Differential Line Receiver
■
Quad Differential Line Receivers
RI1B 1
■
Compatible with the EIA standard for
16 V
CC
RS-422 serial protocol
RI1A 2
15 RI4B
SP26LV432
■
High-Z Output Control
R01 3
14 RI4A
■
14ns Typical Receiver Propagation Delays
ENABLE 4
13 R04
■
60mV Typical Input Hysteresis
12 ENABLE
R02 5
■
Single +3.3V Supply Operation
11 R0
RI2A 6
3
■
Common Receiver Enable Control
7
10 RI A
RI2B
■
26LV32 industry standard footprint compatible
3
9 RI B
GND 8
■
-7.0V to +7.0V Common-Mode Input
3
Voltage Range
■
Switching Rates Up to 50Mbps
Now Available in Lead-Free Packaging
■
Ideal for use with SP26LV431 Quad Drivers
DESCRIPTION
The
SP26LV432
is a quad differential line receiver with three-state outputs designed to meet
the specifications of RS-422. The
SP26LV432
features Sipex's BiCMOS process allowing
low power operational characteristics of CMOS technology while meeting all of the demands
of the RS-422 serial protocol at 50Mbps under load. The RS-422 protocol allows up to ten
receivers to be connected to a multipoint bus transmission line. The
SP26LV432
features a
receiver enable control common to all four receivers and a high-Z output with 6mA source and
sink capability. Since the cabling can be as long as 4,000 feet, the RS-422 receivers of the
SP26LV432
are equipped with a wide (-7.0V to +7.0V) common-mode input voltage range to
accommodate ground potential differences.
TYPICAL APPLICATION CIRCUIT
ENABLE
LOW
HIGH
HIGH
Don't Care
Don't Care
HIGH
Don't Care
ENABLE
HIGH
Don't Care
Don't Care
LOW
LOW
Don't Care
LOW
Input
don't care
V
ID
> V
TH
(max)
V
ID
< V
TH
(min)
V
ID
> V
TH
(max)
V
ID
< V
TH
(min)
Open
Open
Output
High-Z
HIGH
LOW
HIGH
LOW
V
CC
RI A RI B
4
4
INPUTS
RI A RI B
3
3
RI A RI B
2
2
RI A RI B
1
1
ENABLE
ENABLE
R04
HIGH
R03
R02
R01
GND
HIGH
OUTPUTS
Date: 04/27/06
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
© Copyright 2006 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at
these ratings or any other above those indicated in the operation sections
of the specifications below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may affect reliability and
cause permanent damage to the device.
V
CC
(Supply Voltage) ................................................................... +7.0V
V
CM
(Common Mode Range) ........................................................
±14V
V
DIFF
(Differential Input Voltage) ..................................................
±14V
V
IN
(Enable Input Voltage) ................................................... V
CC
+ 1.5V
T
STG
(Storage Temperature Range) ........................... -65°C to +150°C
Maximum Current Per Output ....................................................
±25mA
Storage Temperature .................................................. -65°C to +150°C
Power Dissipation Per Package
16-pin PDIP (derate 14.3mW/ºC above +70ºC) ...................... 1150mW
16-pin NSOIC (derate 8.95mW/ºC above +70ºC) ..................... 725mW
ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the following specifications apply for V
CC
= +3.0V to +3.6V with T
AMB
= 25°C and all MIN
and MAX limits apply across the recommended operating temperature range.
DC PARAMETERS
Supply Voltage, V
CC
Enable Input Rise or Fall Times
Input Electrical Characteristics
Minimum Differential Input Voltage, V
TH
Input Resistance, R
IN
Input Current
I
IN
I
IN
Minimum Enable HIGH Input Level Voltage,
V
IH(EN)
Maximum Enable LOW Input Level Voltage,
V
IL(EN)
Maximum Enable Input Current, I
EN
Input Hysteresis, V
HYST
Quiescent Supply Current, I
CC
Output Electrical Characteristics
Minimum High Level Output Voltage, V
OH
Maximum Low Level Output Voltage, V
OL
Maximum Tri-state Output Leakage Current,
I
OZQ
MIN. TYP. MAX. UNITS
3.0
3
3.6
V
ns
CONDITIONS
-200
5.0
50
+200
mV
KΩ
V
OUT
= V
OH
or V
OL
,
-7V < V
CM
< +7V
V
IN
= -7V, +7V, +10V
other input = GND
+1.25
-1.5
2.0
+1.5
-2.5
mA
mA
V
V
IN
= +10V, other input = GND
V
IN
= -10V, other input = GND
0.8
±1.0
60
5
15
V
µA
mV
mA
V
IN
= V
CC
or GND
V
CM
= 0V
V
CC
= +3.3V, V
DIF
= +1V
V
CC
= +3.0V, V
DIFF
= +1V,
I
OUT
= -6mA
V
CC
= +3.0V, V
DIFF
= -1V,
I
OUT
= +6mA
V
OUT
= V
CC
or GND,
ENABLE = V
IL
, ENABLE = V
IH
2.4
2.8
0.2
±0.5
0.5
±5. 0
V
V
µA
Date: 04/27/06
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
© Copyright 2006 Sipex Corporation
2
SPECIFICATIONS (continued)
Unless otherwise noted, the following specifications apply for V
CC
= +3.0V to +3.6V, T
amb
= 25°C, t
r
< 6ns, t
f
<
6ns, and all MIN and MAX limits apply across the recommended operating temperature range.
MIN. TYP. MAX. UNITS
AC PARAMETERS
Propagation Delays Input to Output,
t
PLH
, t
PHL
Output Rise and Fall Times,
t
RISE
, t
FALL
Propagation Delay ENABLE to Output,
t
PLZ
, t
PHZ
Propagation Delay ENABLE to Output,
t
PZL
, t
PZH
40
ns
40
ns
5
10
ns
14
35
ns
CONDITIONS
Refer to figure 2.
C
L
= 50pF, V
DIFF
= 2.5V, V
CM
= 0V,
V
CC
= +5V
C
L
= 50pF, V
DIFF
= 2.5V, V
CM
= 0V,
V
CC
= +5V
C
L
= 50pF, R
L
= 1000
Ω
, V
DIFF
= 2.5V,
V
CC
= +5V
Refer to Figure 4.
C
L
= 50pF, R
L
= 1000
Ω
, V
DIFF
= 2.5V,
V
CC
= +5V
V
CC
RI A RI B
4
4
INPUTS
RI A RI B
3
3
RI A RI B
2
2
RI A RI B
1
1
ENABLE
ENABLE
R04
GND
Figure 1. SP26LV432 Block Diagram
R03
R02
R01
OUTPUTS
Date: 04/27/06
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
© Copyright 2006 Sipex Corporation
3
RI1B
RI1A
R01
ENABLE
R02
RI2A
RI2B
GND
1
2
3
4
5
6
7
8
SP26LV432
16
15
14
13
12
11
10
9
V
CC
RI4B
RI4A
R04
ENABLE
R03
RI3A
RI3B
PINOUT
PIN DESCRIPTION
PIN NUMBER
PIN NAME
DESCRIPTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
RI
1
B
RI
1
A
R0
1
ENABLE
R0
2
RI
2
A
RI
2
B
GND
RI
3
B
RI
3
A
R0
3
ENABLE
R0
4
RI
4
A
RI
4
B
V
CC
Inverted RS-422 receiver input.
Non-inverted RS-422 receiver input.
TTL receiver output.
Receiver input enable, active HIGH.
TTL receiver output.
Non-inverted RS-422 receiver input.
Inverted RS-422 receiver input.
Ground.
Inverted RS-422 receiver input.
Non-inverted RS-422 receiver input.
TTL receiver output.
Receiver input enable, active LOW.
TTL receiver output.
Non-inverted RS-422 receiver input.
Inverted RS-422 receiver input.
+3.0V to +3.6V power supply.
Date: 04/27/06
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
© Copyright 2006 Sipex Corporation
4
AC TEST CIRCUITS AND SWITCHING TIME WAVEFORMS
V
CC
S1
+2.5V
INPUTS
(V-) – (V+)
0V
-2.5V
t
PHL
t
PLH
V+ INPUT
t
t
PHL
PLH
90%
90%
10%
t
FALL
V
OH
OUTPUT
50%
V
OL
10%
t
RISE
V- INPUT
ENABLE
ENABLE
DEVICE
UNDER
TEST
R
L
C
L
C
L
includes load and test jig capacitance.
S1 = V
CC
for t
PZL
and t
PLZ
measurements.
S1 = GND for t
PZH
and t
PHZ
measurements.
Figure 2. Propagation Delay
Figure 3. Test Circuit for high-Z Output Timing
ENABLE
ENABLE
3.0V
1.3V
GND
Differential Prop. Delay (ns)
16
1.3V
15
t
PHLD
t
PLZ
V
CC
OUTPUT
V
OL
V
OH
OUTPUT
0V
t
PHZ
0.5V
0.5V
t
PZL
50%
14
t
PLHD
13
50%
t
PZH
12
11
10
-40
-15
10
35
60
85
Temperature (°C)
Figure 4. High Impedance Output Enable and Disable
Waveforms
17
Figure 5. Differential Propagation Delay vs Temperature
2
1.8
t
PHLD
1.6
1.4
1.2
1
0.8
16
Differential Prop. Delay (ns)
14
13
t
PLHD
12
11
3.0
Differential Skew (ns)
3.4
3.5
3.6
15
3.1
3.2
3.3
0.6
-40
-15
10
35
60
85
Power Supply Voltage (V)
Temperature (°C)
Figure 6. Differential Propagation Delay vs Supply
Voltage
Date: 04/27/06
Figure 7. Differential Skew vs Temperature
© Copyright 2006 Sipex Corporation
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
5
