SP6132H
High Voltage, 300KHz Synchronous PWM Controller
FEATURES
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3V to 28V Step Down Achieved Using Dual Input
On-Board 1.5Ω sink (2Ω source) NFET Drivers
Up to 30A Output Capability
Highly Integrated Design, Minimal Components
UVLO Detects Both V
CC
and V
IN
Short Circuit Protection with Auto-Restart
Wide BW Amp Allows Type II or III Compensation
Programmable Soft Start
Fast Transient Response
High Efficiency: Greater than 95% Possible
A Synchronous Start-Up into a Pre-Charged Output
Small 10-Pin MSOP Package
U.S. Patent #6,922,041
V
CC
1
GL
2
GND
3
V
FB
4
COMP
5
10
BST
SP6132H
10 Pin MSOP
9
GH
8
SWN
7
SS
6
UVIN
Now Available in Lead Free Packaging
APPLICATIONS
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Wireless Base Station
Automotive
Industrial
Power Supply
DESCRIPTION
The SP6132H is a synchronous step-down switching regulator controller optimized for high efficiency. The part is
designed to be especially attractive for dual supply, 12V step down with 5V used to power the controller. This lower V
CC
voltage minimizes power dissipation in the part. The SP6132H is designed to drive a pair of external NFETs using a
fixed 300kHz frequency, PWM voltage mode architecture. Protection features include UVLO, thermal shutdown and
output short circuit protection. The SP6132H is available in the cost and space saving 10-pin MSOP
.
TYPICAL APPLICATION CIRCUIT
VIN
3.0 - 28V
22µF
22µF
FDS7088N3
4
GND
V
CC
2.7µH @ 12A
MBR0530
2.5V
10 A
V
OUT
4.64k, 1%
FDS7088N3
5.11, 1%
47nF
31.6k, 1%
4
SP6132H
VCC
BST
GH
SWN
SS
UVIN
GL
GND
VFB
COMP
1µF
47µF
47µF
220pF
10µF
221k, 1%
68.1k, 1%
100k, 1%
0.1µF
100pF
1500pF 27.4k, 1%
22pF
Date:2/14/06
SP6132H High Voltage, Synchronous PWM Controller
© Copyright 2006 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at
these ratings or any other above those indicated in the operation sections
of the specifications below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may affect reliability.
V
CC
.................................................................................................. 7V
BST ............................................................................................... 33V
BST-SWN ......................................................................... -0.3V to 7V
SWN ................................................................................... -1V to 30V
GH ......................................................................... -0.3V to BST+0.3V
GH-SWN ......................................................................................... 7V
All other pins .......................................................... -0.3V to V
CC
+0.3V
Peak Output Current < 10us
GH,GL ............................................................................................. 2A
Storage Temperature .................................................. -65°C to 150°C
Power Dissipation .......................................................................... 1W
Lead Temperature (Soldering, 10 sec) ...................................... 300°C
ESD Rating .......................................................................... 2kV HBM
Thermal Resistance ............................................................. 41.9°C/W
ELECTRICAL SPECIFICATIONS
Unless otherwise specified: 0°C < T
AMB
< 70°C, 4.5V < V
CC
< 5.5V, BST=V
CC
,SWN = GND = ZeroV, UV
IN
= 3.0V, CV
CC
=
10µF, C
COMP
= 0.1µF, CGH = CGL = 3.3nF, C
SS
= 50nF, Typical measured at V
CC
=5V. The
♦
denotes the specifications
which apply over the -40°C to 85°C temperature range, unless otherwise specified.
PARAMETER
QUIESCENT CURRENT
V
CC
Supply Current
BST Supply Current
PROTECTION: UVLO
V
CC
UVLO Start Threshold
V
CC
UVLO Hysteresis
UVIN Start Threshold
UVIN Hysteresis
UVIN Input Current
ERROR AMPLIFIER REFERENCE
Error Amplifier Reference
Error Amplifier Reference
Over Line and Temperature
Error Amplifier Transconductance
Error Amplifier Gain
COMP Sink Current
COMP Source Current
V
FB
Input Bias Current
Internal Pole
COMP Clamp
COMP Clamp Temp. Coefficient
Ramp Amplitude
RAMP Offset
RAMP Offset Temp. Coefficient
GH Minimum Pulse Width
Maximum Controllable Duty Ratio
Maximum Duty Ratio
Internal Oscillator Frequency
MIN
TYP
1.5
0.2
MAX
3
0.4
4.5
300
2.65
400
1
UNITS
mA
mA
V
mV
V
mV
µA
♦
♦
CONDITIONS
V
FB
= 0.9V (No switching)
V
FB
= 0.9V (No switching)
4.00
100
2.3
200
4.25
200
2.5
300
UVIN = 3.0V
0.792
0.788
0.800
0.800
6
60
150
150
50
4
2.5
-2
0.808
0.812
V
V
ms
dB
µA
µA
♦
2X Gain Config., Measure V
FB
No Load
V
FB
= 0.9V, COMP = 0.9V
V
FB
= 0.7V, COMP = 2.2V
♦
200
nA
MHz
V
mV/°C
V
FB
= 0.8V
V
FB
=0.7V, T
A
= 25°C
CONTROL LOOP: PWM COMPARATOR, RAMP & LOOP DELAY PATH
0.92
1.1
1.1
-2
90
92
100
255
240
300
300
345
360
97
180
1.28
V
V
mV/°C
ns
%
%
kHz
♦
♦
♦
T
A
= 25°C, RAMP COMP
until GH starts switching
Maximum Duty Ratio Measured just
before pulse skipping begins
Valid for 20 Cycles
Date:2/14/06
SP6132H High Voltage, Synchronous PWM Controller
© Copyright 2006 Sipex Corporation
2
ELECTRICAL SPECIFICATIONS: Continued
Unless otherwise specified: 0°C < T
AMB
< 70°C, 4.5V < V
CC
< 5.5V, BST=V
CC
,SWN = GND = ZeroV, UVIN = 3.0V, CV
CC
=
10µF, C
COMP
= 0.1µF, CGH = CGL = 3.3nF, C
SS
= 50nF, Typical measured at V
CC
=5V. The
♦
denotes the specifications
which apply over the full operating temperature range, unless otherwise specified.
PARAMETER
TIMERS: SOFTSTART
SS Charge Current:
SS Discharge Current:
Short Circuit Threshold Voltage
Hiccup Timeout
Number of Allowable Clock Cycles
at 100% Duty Cycle
Minimum GL Pulse After 20 Cycles
Thermal Shutdown Temperature
Thermal Recovery Temperature
Thermal Hysteresis
OUTPUT: NFET GATE DRIVERS
GH & GL Rise Times
GH & GL Fall Times
GL to GH Non Overlap Time
SWN to GL Non Overlap Time
GH & GL Pull Down Resistance
MIN
TYP
10
MAX
UNITS
µA
mA
♦
CONDITIONS
1
0.2
0.25
200
20
0.5
145
135
10
35
30
45
25
15
50
50
40
70
40
85
0.3
Fault Present, SS = 0.2V
Measured V
REF
(0.8V) - V
FB
V
FB
= 0.5V
V
FB
= 0.7V
V
FB
= 0.7V
PROTECTION: SHORT CIRCUIT & THERMAL
V
ms
Cycles
Cycles
°C
°C
°C
ns
ns
ns
ns
KΩ
♦
♦
♦
♦
♦
Measured 10% to 90%
Measured 90% to 10%
GH & GL Measured at 2.0V
Measured SWN = 100mV to GL = 2.0V
PIN DESCRIPTION
PIN #
1
2
3
4
PIN NAME DESCRIPTION
V
CC
Bias Supply Input. Connect to external 5V supply. Used to power internal circuits and
low side gate driver.
GL
High current driver output for the low side NFET switch. It is always low if GH is high or
during a fault. Resistor pull down ensures low state at low voltage.
GND
Ground Pin. The control circuitry of the IC and lower power driver are referenced to this
pin. Return separately from other ground traces to the (-) terminal of C
OUT
.
V
FB
Feedback Voltage and Short Circuit Detection pin. It is the inverting input of the Error
Amplifier and serves as the output voltage feedback point for the Buck Converter. The
output voltage is sensed and can be adjusted through an external resistor divider.
Whenever V
FB
drops 0.25V below the positive reference, a short circuit fault is detected
and the IC enters hiccup mode.
COMP
Output of the Error Amplifier. It is internally connected to the non-inverting input of the
PWM comparator. An optimal filter combination is chosen and connected to this pin and
either ground or V
FB
to stabilize the voltage mode loop.
UVIN
UVLO input for V
IN
voltage. Connect a resistor divider between V
IN
and UV
IN
to set
minimum operating voltage.
SS
Soft Start. Connect an external capacitor between SS and GND to set the soft start rate
based on the 10µA source current. The SS pin is held low via a 1mA (min) current during
all fault conditions.
SWN
Lower supply rail for the GH high-side gate driver. Connect this pin to the switching node
at the junction between the two external power MOSFET transistors.
GH
High current driver output for the high side NFET switch. It is always low if GL is high or
during a fault. Resistor pull down ensures low state at low voltage.
BST
High side driver supply pin. Connect BST to the external boost diode and capacitor as
shown in the Typical Application Circuit on page 1. High side driver is connected between
BST pin and SWN pin.
SP6132H High Voltage, Synchronous PWM Controller
© Copyright 2006 Sipex Corporation
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Date:2/14/06
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FUNCTIONAL DIAGRAM
5 COMP
100% Protection Logic
PULSES CLR
COUNT 20
CLOCK
FAULT
CLK
RESET
DOMINANT
10 BST
VCC
Gm ERROR AMPLIFIER
VPOS
VCC
10
µA
SS 7
SOFTSTART INPUT
POS REF
VCC
FAULT
Gm
PWM LOOP
VFBINT
9 GH
SYNCHRONOUS
DRIVER
8 SWN
2 GL
FAULT
VFB
R
Q
S
300 kHZ
QPWM
RAMP = 1.1V
FAULT
0.4 V
CLK
CLOCK PULSE GENERATOR
SS
REFERENCE
CORE
GL HOLD OFF
0.8V
REF OK
V
CC
1
1.7 V
1.7 V
ASYNC. STARTUP
COMPARATOR
3 GND
THERMAL
SHUTDOWN
145 ˚C ON
135 ˚C OFF
SET
DOMINANT
S
VPOS
VFBINT
0.25 V
+-
SHORT CIRCUIT
DETECTION
+
-
Q
HICCUP FAULT
FAULT
REF OK
R
VCC
+
4.25 V ON
4.05 V OFF -
+
2.50 VON
-
2.20 V OFF
VCC UVLO
POWER FAULT
VIN UVLO
CLK
COUNTER
200ms Delay
6
UVIN
CLR
REF OK
THERMAL AND SHORT CIRCUIT PROTECTION
UVLO COMPARATORS
THEORY OF OPERATION
General Overview
The SP6132H is a fixed frequency, voltage
mode, synchronous PWM controller optimized
for high efficiency. The part has been designed
to be especially attractive for split plane applica-
tions which utilize 5V to power the controller
and 3V to 12V for step down conversion.
The heart of the SP6132H is a wide bandwidth
transconductance amplifier designed to accom-
modate Type II and Type III compensation
schemes. A precision 0.8V reference present on
the positive terminal of the error amplifier per-
mits the programming of the output voltage
down to 0.8V via the V
FB
pin. The output of the
error amplifier, COMP, compared to a 1.1V
peak-to-peak ramp is responsible for trailing
edge PWM control. This voltage ramp and PWM
control logic are governed by the internal oscil-
lator that accurately sets the PWM frequency to
300kHz.
Date:2/14/06
The SP6132H contains two unique control fea-
tures that are very powerful in distributed appli-
cations. First, asynchronous driver control is
enabled during start up to prohibit the low side
NFET from pulling down the output until the
high side NFET has attempted to turn on. Sec-
ond, a 100% duty cycle timeout ensures that the
low side NFET is periodically enhanced during
extended periods at 100% duty cycle. This guar-
antees the synchronized refreshing of the BST
capacitor during very large duty ratios.
The SP6132H also contains a number of valu-
able protection features. A programmable input
(V
IN
) UVLO allows a user to set the exact value
at which the conversion voltage is at a safe point
to begin down conversion, and an internal V
CC
UVLO ensures that the controller itself has
enough voltage to properly operate. Other pro-
© Copyright 2006 Sipex Corporation
SP6132H High Voltage, Synchronous PWM Controller
4
THEORY OF OPERATION: Continued
tection features include thermal shutdown and
short-circuit detection. In the event that either a
thermal, short-circuit, or UVLO fault is de-
tected, the SP6132H is forced into an idle state
where the output drivers are held off for a finite
period before a re-start is attempted.
Soft Start
Thermal and Short-Circuit
Protection
“Soft Start” is achieved when a power converter
ramps up the output voltage while controlling
the magnitude of the input supply source cur-
rent. In a modern step down converter, ramping
up the positive terminal of the error amplifier
controls soft start. As a result, excess source
current can be defined as the current required to
charge the output capacitor.
IV
IN
= C
OUT
*
∆V
OUT
/
∆TSoft-start
The SP6132H provides the user with the option
to program the soft start rate by tying a capacitor
from the SS pin to GND. The selection of this
capacitor is based on the 10uA pull up current
present at the SS pin and the 0.8V reference
voltage. Therefore, the excess source can be
redefined as:
IV
IN
= C
OUT
*
∆V
OUT
*10µA / (C
SS
* 0.8V)
Under Voltage Lock Out (UVLO)
Because the SP6132H is designed to drive large
NFETs running at high current, there is a chance
that either the controller or power converter will
become too hot. Therefore, an internal thermal
shutdown (145°C) has been included to prevent
the IC from malfunctioning at extreme tempera-
tures.
A short-circuit detection comparator has also
been included in the SP6132H to protect against
the accidental short or severe build up of current
at the output of the power converter. This com-
parator constantly monitors the positive and
negative terminals of the error amplifier, and if
the V
FB
pin ever falls more than 250mV (typi-
cal) below the positive reference, a short-circuit
fault is set. Because the SS pin overrides the
internal 0.8V reference during soft start, the
SP6132H is capable of detecting short-circuit
faults throughout the duration of soft start as
well as in regular operation.
Handling of Faults:
The SP6132H contains two separate UVLO
comparators to monitor the bias (V
CC
) and con-
version (V
IN
) voltages independently. The V
CC
UVLO threshold is internally set to 4.25V,
whereas the V
IN
UVLO threshold is program-
mable through the UVIN pin. When the UVIN
pin is greater than 2.5V, the SP6132H is permit-
ted to start up pending the removal of all other
faults. Both the V
CC
and V
IN
UVLO compara-
tors have been designed with hysteresis to pre-
vent noise from resetting a fault.
Upon the detection of power (UVLO), thermal,
or short-circuit faults, the SP6132H is forced
into an idle state where the SS and COMP pins
are pulled low and the gate drivers are held off.
In the event of UVLO fault, the SP6132H re-
mains in this idle state until after the UVLO fault
is removed. Upon the detection of thermal or
short-circuit faults, an internal 200ms (typical)
timer is activated. In the event of a short-circuit
fault, a re-start is attempted immediately after
the 200ms timeout expires. Whereas, when a
thermal fault is detected the 200ms delay con-
tinuously recycles and a re-start cannot be at-
tempted until the thermal fault is removed and
the timer expires.
Date:2/14/06
SP6132H High Voltage, Synchronous PWM Controller
© Copyright 2006 Sipex Corporation
5
