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SP6201EM5-L-3.3/TR

Fixed Positive LDO Regulator, 3.3V, 0.5V Dropout, CMOS, PDSO5, LEAD FREE, MO-178AA, SOT-23, 5 PIN

器件类别:电源/电源管理    电源电路   

厂商名称:SIPEX

厂商官网:http://www.sipex.com/

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
SIPEX
包装说明
LEAD FREE, MO-178AA, SOT-23, 5 PIN
Reach Compliance Code
unknown
可调性
FIXED
最大回动电压 1
0.5 V
标称回动电压 1
0.32 V
最大绝对输入电压
7 V
最大输入电压
6 V
最小输入电压
2.5 V
JESD-30 代码
R-PDSO-G5
JESD-609代码
e3
长度
2.9 mm
最大电网调整率
0.0112%
最大负载调整率
0.0165%
湿度敏感等级
1
功能数量
1
输出次数
1
端子数量
5
工作温度TJ-Max
125 °C
工作温度TJ-Min
-40 °C
最大输出电流 1
0.2 A
最大输出电压 1
3.399 V
最小输出电压 1
3.201 V
标称输出电压 1
3.3 V
封装主体材料
PLASTIC/EPOXY
封装代码
LSSOP
封装等效代码
TSOP5/6,.11,37
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
包装方法
TAPE AND REEL
峰值回流温度(摄氏度)
260
认证状态
Not Qualified
调节器类型
FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度
1.45 mm
表面贴装
YES
技术
CMOS
端子面层
Matte Tin (Sn)
端子形式
GULL WING
端子节距
0.95 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
40
最大电压容差
3%
宽度
1.6 mm
文档预览
®
SP6200/6201
Micropower, 100mA and 200mA CMOS LDO Regulators
FEATURES
Tiny DFN Package (2mmX3mm)
Low Dropout Voltage: 160mV @ 100mA
High Output Voltage Accuracy: 2%
Ultra Low Shutdown Current: 1µA Max
Ultra Low GND Current:
• 200µA @ 200mA Load
• 28µA @ 100µA Load
Extremely Tight Load and Line Regulation
Current and Thermal Limiting
RESET Output (V
OUT
good)
Logic-Controlled Electronic Enable
Unconditionally Stable with 1µF Ceramic
Fixed Outputs:
• 1.5V, 1.8V, 2.5V, 2.7V, 2.85V, 3.0V, 3.3V, 3.5V, 5V
Adjustable Output Available
NC 1
VIN 2
VOUT 3
NC 4
8 EN
SP6201
8 Pin DFN
7 GND
6 NC
5 RESET
Now Available in Lead Free Packaging
APPLICATIONS
Cellular Telephones
Laptop, Notebooks and Palmtop Computers
Battery-Powered Equipment
Consumer/ Personal Electronics
SMPS Post-Regulator
DC-to-DC Modules
Medical Devices
Data Cable
Pagers
DESCRIPTION
The SP6200 and SP6201 are CMOS LDOs designed to meet a broad range of applications that require accuracy, speed
and ease of use. These LDOs offer extremely low quiescent current which only increases slightly under load, thus
providing advantages in ground current performance over bipolar LDOs. The LDOs handle an extremely wide load range
and guarantee stability with a 1µF ceramic output capacitor. They have excellent low frequency PSRR, not found in other
CMOS LDOs and thus offer exceptional Line Regulation. High frequency PSRR is better than 40dB up to 400kHz. Load
Regulation is excellent and temperature stability is comparable to bipolar LDOs. An enable feature is provided on all
versions.
The SP6200/6201 is available in fixed and adjustable output voltage versions in tiny DFN and small SOT-23-5 packages.
A V
OUT
good indicator is provided on all fixed output versions.
TYPICAL APPLICATION CIRCUIT
Fixed Output Voltage
470kΩ
V
IN
1
C
IN
=
1µF
2
Enable
Shutdown
5
V
OUT
C
OUT
=
1µF
SP6200
SP6201
4
3
EN
EN (pin 3) may be connected
directly to IN (pin 1).
RSN (V
OUT
good)
Date: 8/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
© Copyright 2004 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS, NOTE 1
These are stress ratings only and functional operation of
the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may affect
reliability.
Supply Input Voltage (V
IN
) ............................. -2V to 7V
Output Voltage (V
OUT
) ......................... -0.6 to (V
IN
+1V)
Enable Input Voltage (V
EN
) ............................ -2V to 7V
Power Dissipation (P
D
) .......... Internally Limited, Note 3
Lead Temperature (soldering 5s) ....................... 260°C
Storage Temperature ........................ -65˚C to +150˚C
OPERATING RATINGS, NOTE 2
Input Voltage (V
IN
)..................................+2.5V to +6V
Enable Input Voltage (V
EN
)..........................0V to +6V
Junction Temperature (T
J
)................-40˚C to +125˚C
Thermal Resistance (See Note 3):
SOT-23-5 (θ
JA
)...................................................90˚C/W
8 Pin DFN (θ
JA
)............................................ .....59˚C/W
(See Note 3)
ELECTRICAL CHARACTERISTICS
V
IN
= V
OUT
+1V, V
O
= 5V for ADJ, I
L
= 100µA, C
IN
= 1.0µF, C
OUT
= 1.0µF, T
J
= 25
°
C , unless otherwise specified. The
denotes the specifications
which apply over the full operating temperature range, unless otherwise specified.
PARAMETER
Output Voltage Accuracy, (V
O
)
Reference Voltage
Output Voltage Temperature
Coefficient, Note 4, (∆V
O
/∆T)
Minimum Supply Voltage
MIN
-2
-3
1.213
TYP
MAX
2
3
UNIT
%
%
V
ppm/
°C
CONDITIONS
Variation from specified V
OUT
Adjustable version only
1.250
60
2.50
2.55
2.70
3.00
0.03
0.07
0.14
0.3
0.3
0.2
70
160
320
1.287
2.70
2.80
2.95
3.50
0.2
0.25
0.50
1
1
4
7
120
160
250
300
400
500
1
40
45
200
250
400
500
V
V
V
V
%/ V
%
%
%
%
mV
mV
mV
mV
mV
mV
mV
mV
µA
µA
µA
µA
µA
µA
µA
dB
I
L
= 100µA
I
L
= 50mA
I
L
= 100mA
I
C
= 200mA
V
IN
= (V
OUT
+ 1V) to 6V
I
L
= 0.1mA to 100mA, SP6200
I
L
= 0.1mA to 200mA, SP6201
I
L
= 0.1mA to 100mA, V
IN
= 2.95V
I
L
= 0.1mA to 200mA, V
IN
= 3.5V
I
L
= 100µA
I
L
= 50mA
I
L
= 100mA
I
L
= 200mA, SP6201 Only
V
EN
≥2.0V,
I
L
= 100mA, SP6200
only (for 1.5 & 1.8, V
IN
= 2.95)
V
EN
≥2.0V,
I
L
= 200mA, SP6201
Only (for 1.5 & 1.8, V
IN
= 3.5)
Frequency =100Hz, IL =10mA
Frequency = 400Hz, IL=10mA
SP6200
SP6201
Turns On
Turns Off
V
EN
0.4V
V
EN
2.0V, I
L
= 100µA
Line Regulation, (∆V
O
/ V
IN
)
Load Regulation, Note 5, (∆V
O /
V
O
)
SP6200-1.5V & 1.8 Load Regulation
SP6201-1.5V & 1.8 Load Regulation
Dropout Voltage, Note 6, (V
IN
– V
O
)
(Not applicable to voltage options below
2.7V)
Shutdown Quiescent Current, (I
GND
)
Ground Pin Current, Note 7, (I
GND
)
0.01
28
110
200
Power Supply Rejection Ratio,
(PSRR)
Current Limit, (I
CL
)
Thermal Limit
100
300
78
40
140
420
162
147
200
600
mA
mA
°C
°C
Date: 8/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
© Copyright 2004 Sipex Corporation
2
ELECTRICAL CHARACTERISTICS: Continued
V
IN
= V
OUT
+1V, V
O
= 5V for ADJ, I
L
= 100µA, C
IN
= 1.0µF, C
OUT
= 1.0µF, T
J
= 25
°
C , unless otherwise specified. The
denotes the
specifications which apply over the full operating temperature range, unless otherwise specified.
PARAMETER
Thermal Regulation,
Note 8, (∆V
O
/∆P
D
)
Output Noise, (e
no
)
MIN
TYP
0.05
MAX
UNITS
%/W
CONDITIONS
150
ENABLE INPUT
Enable Input Logic-Low Voltage,
(V
IL
)
Enable Input Logic-High Voltage,
(V
IH
)
Enable Input Current, (I
IL
), (I
IH
)
Reset Not Output
-2
1.6
0.01
0.01
-4
1
1
-6
0.4
µVrms
I
L
= 50mA, C
L
= 1µF
0.1µF from V
OUT
to Adj.
10Hz to 100kHz
Regulator Shutdown
Regulator Enabled
V
IL
< 0.4V
V
IH
> 2.0V
Threshold
V
V
µA
µA
%
Note 1.
Exceeding the absolute maximum rating may damage the device.
Note 2.
The device is not guaranteed to function outside its operating rating.
Note 3.
The maximum allowable power dissipation at any T
A
(ambient temperature) is P
D (MAX)
= (T
J (MAX)
– T
A
) /
θ
ϑA
.
Exceeding the maximum allowable power dissipation will result in excessive die temperature, and the regulator will
go into thermal shutdown. The
θ
JA
of the SP6200/6201 (all versions) is 90°C/W for the SOT-23-5 and 59°C/W for
the DFN package on a standard 4 layer board (see “Thermal Considerations” section for further details).
Note 4.
Output voltage temperature coefficient is defined as the worst case voltage change divided by the total
temperature range.
Note 5.
Load Regulation is measured at constant junction temperature using low duty cycle pulse testing. Parts are
tested for load regulation in the load range; from 0.1mA to 100mA, SP6200; from 0.1mA to 200mA, SP6201. Changes
in output voltage due to heating effects are covered by the thermal regulation specification. Not applicable to output
voltages less than 2.5V.
Note 6.
Dropout Voltage is defined as the input to output differential at which the output voltage drops 2% below
its nominal value measured at 1V differential. Not applicable to output voltages less than 2.7V.
Note 7.
Ground pin current is the regulator quiescent current. The total current drawn from the supply is the sum
of the load current plus the ground pin current.
Note 8.
Thermal regulation is defined as the change in output voltage at a time ”t” after a change in power dissipation
is applied, excluding load or line regulation effects. Specifications are for a 100mA load pulse at V
IN
= 6V for t = 10ms.
Date: 8/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
© Copyright 2004 Sipex Corporation
3
V
IN
Current Limit
and Thermal
Shutdown
OUT
V
OUT
C
OUT
Enable
V
REF
Bandgap
REF
1.25V
R2
-
+
R
PULL
R1
RSN
1.20V
RESET
GND
Figure 1. Fixed Voltage Regulator
V
IN
IN
OUT
V
OUT
C
OUT
Enable
EN
-
V
REF
Bandgap
REF
1.25V
+
Current Limit
and Thermal
Shutdown
R2
C
BYP
(option)
ADJ
R1
RSN
1.20V
V
OUT
= V
REF
R2
+1
R1
GND
Figure 2. Adjustable Voltage Regulator
Date: 8/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
© Copyright 2004 Sipex Corporation
4
PIN DESCRIPTION
PIN NUMBER
1
2
3
4
4
5
NAME
IN
GND
EN
RSN (Reset Not)
ADJ
OUT
FUNCTION
Supply Input
Ground
Enable/Shutdown (Input): CMOS or TTL compatible
input. Logic high = enable, logic low = shutdown
Open drain indicating that V
OUT
is good
Adjustable (Input): Adjustable regulator feedback
input. Connect resistor voltage divider.
Regulator Output
PIN NUMBER
1
2
3
4
5
6
7
8
NAME
NC
VIN
VOUT
NC
RSN
NC
GND
EN
(8 Pin DFN) FUNCTION
No Connect
Supply Input
Regulator Input
No Connect
Open drain indicating that V
OUT
is good
No Connect
Ground
Enable/Shutdown (Input): CMOS or TTL compatible
input. Logic high = enable, logic low = shutdown
Date: 8/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
© Copyright 2004 Sipex Corporation
5
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