SP6203 / SP6205
300mA/500mA Low Noise CMOS LDO Regulators
August 2018
Rev. 2.0.1
GENERAL DESCRIPTION
The SP6203 and SP6205 are ultra low noise
CMOS LDOs with very low dropout and ground
current. The noise performance is achieved by
means of an external bypass capacitor without
sacrificing turn-on and turn-off speed critical
to portable applications. Extremely stable and
easy to use, these devices offer excellent
PSRR and Line/Load regulation. Target
applications
include
battery-powered
equipment such as portable and wireless
products. Regulators' ground current increases
only slightly in dropout. Fast turn-on/turn-off
enable control and an internal 30Ω pull down
on output allows quick discharge of output
even under no load conditions. Both LDOs are
protected with current limit and thermal
shutdown.
The SP6205 is available in fixed & adjustable
output voltage versions and come in an
industry standard 5-pin SOT-23 and small
2X3mm 8-pin DFN packages. For SC-70
100mA CMOS LDO, SP6213 is available.
APPLICATIONS
•
Battery-Powered Systems
•
Medical Equipments
•
MP3/CD Players
•
Digital Cameras
FEATURES
•
300mA/500mA Output Current
−
SP6203: 300mA – SP6205: 500mA
−
Low Dropout Voltage: 0.6Ω PMOS FET
•
2.7V to 5.5V Input Voltage
−
Fixed and Adjustable Output Voltage
−
Accurate Output Voltage: 2% over Temp.
•
67dB Power Supply Rejection Ratio
•
12μV
RMS
Low Output Noise
•
Unconditionally Stable with 2.2μF
Ceramic
•
Low Quiescent Current: 5μA
•
Low Ground Current: 350μA at 500mA
•
Fast Turn-On and Turn-Off: 60μS
•
Very Good Load/Line Regulation:
0.07/0.04 %
•
Current Limit and Thermal Protection
•
RoHS Compliant “Green”/Halogen Free
5-Pin SOT23 and 8-Pin DFN Packages
TYPICAL APPLICATION DIAGRAM
Fig. 1: SP6203/SP6205 Application Diagram
1/15
Rev. 2.0.1
SP6203 / SP6205
300mA/500mA Low Noise CMOS LDO Regulators
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of
the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may affect
reliability.
V
IN
.............................................................. -2V to 6.0V
Output Voltage V
OUT
.............................. -0.6V to V
IN
+1V
Enable Input Voltage V
EN
................ .. ...............-2V to 6V
Storage Temperature .............................. -65°C to 150°C
Power Dissipation ............................... Internally Limited
1
Lead Temperature (Soldering, 5 sec) ................... +260°C
Junction Temperature ........................................ +150°C
OPERATING RATINGS
Input Voltage Range V
IN
.......................... +2.7V to +5.5V
Enable Input Voltage V
EN
................... ...............0 to 5.5V
Junction Temperature Range ................. -40°C to +125°C
Thermal Resistance ......................................................
SOT-23-5 (θ
JA
) .............................................191°C/W
DFN-8 (θ
JA
) ................................................... 59°C/W
Note 1: Maximum power dissipation can be calculated
using the formula: P
D
= (T
J
(max) - T
A
) / θ
JA
, where
T
J
(max) is the junction temperature, T
A
is the ambient
temperature and θ
JA
is the junction-to-ambient thermal
resistance. θ
JC
is 6°C/W for this package. Exceeding the
maximum allowable power dissipation will result in
excessive die temperature and the regulator will go into
thermal shutdown mode.
ELECTRICAL SPECIFICATIONS
Specifications with standard type are for an Operating Junction Temperature of T
J
= 25°C only; limits applying over the full
Operating Junction Temperature range are denoted by a “•”. Minimum and Maximum limits are guaranteed through test,
design, or statistical correlation. Typical values represent the most likely parametric norm at T
J
= 25°C, and are provided for
reference purposes only. Unless otherwise indicated, V
IN
= (V
OUT
+ 0.5V) to 6V, C
IN
= 2.2µF, C
OUT
= 2.2µF and I
OUT
= 100µA,
T
J
= –40°C to 85°C.
Parameter
Input Voltage
Output Voltage
Output Voltage
Temperature Coefficient
2
Reference Voltage
Line Regulation
Load Regulation
3
1.225
-2
50
1.25
0.04
0.07
0.13
0.06
60
120
180
300
45
110
175
235
350
0.01
0.33
0.55
0.50
0.85
170
12
67
150
630
12
50
0.05
8
Min.
Typ.
Max.
6
+2
Units
V
%
ppm/°C
•
•
Conditions
Variation from specified V
OUT
∆ V
OUT
/∆T
•
Adjustable version only
∆V
OUT
(V
IN
below 6V)
I
OUT
= 0.1mA to 300mA (SP6203)
I
OUT
= 0.1mA to 500mA (SP6205)
I
OUT
I
OUT
I
OUT
I
OUT
I
OUT
I
OUT
I
OUT
I
OUT
I
OUT
I
OUT
=
=
=
=
=
=
=
=
=
=
0.1mA
100mA
200mA
300mA (SP6203)
500mA (SP6205)
0.1mA (I
QUIESCENT
)
100mA
200mA
300mA (SP6203)
500mA (SP6205)
1.275
0.3
0.3
0.5
V
%/V
%
Dropout Voltage for V
OUT
≥ 3.0V
4
300
500
100
330
490
1
0.8
1.4
mV
•
•
•
Ground Pin Current
5
µA
•
•
•
Shutdown Supply Current
Current Limit
Thermal Shutdown Junction
Temperature
Thermal Shutdown Hysteresis
Power Supply Rejection Ratio
Output Noise Voltage
6
Thermal Regulation
7
µA
A
°C
°C
dB
µV
RMS
V
EN
< 0.4V (shutdown)
V
OUT
= 0V (SP6203)
V
OUT
= 0V (SP6205)
Regulator Turns off
Regulator turns on again at 158°C
f ≤ 1kHz
C
BYP
C
BYP
C
BYP
C
BYP
=
=
=
=
0nF, I
OUT
= 0.1mA
0nF, I
OUT
= 300mA
10nF, I
OUT
= 0.1mA
10nF, I
OUT
= 300mA
75
%/W
50
µS
∆V
OUT
/ ∆P
D
V
IN
≥ 4V
10
I
OUT
= 30mA
Wake-Up Time (T
WU
)
(from shutdown mode)
25
2/15
Rev. 2.0.1
SP6203 / SP6205
300mA/500mA Low Noise CMOS LDO Regulators
Parameter
Turn-On Time (T
ON
)
9
(from shutdown mode)
Turn-Off Time (T
OFF
)
Output Discharge Resistance
Enable Input Logic Low Voltage
Enable Input Logic High Voltage
1.6
Min.
Typ.
60
100
15
30
0.4
Max.
120
250
25
Units
µS
µS
Ω
V
V
•
•
V
IN
≥ 4V
10
I
OUT
= 30mA
I
OUT
= 0.1mA, V
IN
≥ 4V
10
I
OUT
= 300mA, V
IN
≥ 4V
10
No Load
Regulator Shutdown
Regulator Enabled
Conditions
Note 2: Output voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature
range.
Note 3: Regulation is measured at constant junction temperature using low duty cycle pulse testing. Changes in output
voltage due to heating effects are covered by the thermal regulation specification.
Note 4: Dropout-voltage is defined as the input to output differential at which the output voltage drops 2% below its
nominal value measured at 1V differential.
Note 5: Ground pin current is the regulator quiescent current. The total current drawn from the supply is the sum of the
load current plus the ground pin current.
Note 6: Output noise voltage is defined within a certain bandwidth, namely 10Hz < BW < 100kHz. An external bypass cap
(10nF) from reference output (BYP pin) to ground significantly reduces noise at output.
Note 7: Thermal regulation is defined as the change in output voltage at a time “t” after a change in power dissipation is
applied, excluding load and line regulation effects. Specifications are for a 300mA load pulse at V
IN
= 6V for t = 1ms.
Note 8: The wake-up time (T
WU
) is defined as the time it takes for the output to start rising after enable is brought high.
Note 9: The total turn-on time is called the settling time (T
S
), which is defined as the condition when both the output and
the bypass node are within 2% of their fully enabled values when released from shutdown.
Note 10: For output voltage versions requiring V
IN
to be lower than 4V, timing (T
ON
& T
OFF
) increases slightly.
BLOCK DIAGRAM
Fig. 2: SP6203/SP6205 Functional Diagram
3/15
Rev. 2.0.1
SP6203 / SP6205
300mA/500mA Low Noise CMOS LDO Regulators
PIN ASSIGNMENT
5-Pin SOT23
Fig. 3: SP6203/SP6205 Pin Assignment
8-Pin DFN
PIN DESCRIPTION
Name
V
IN
GND
EN
SOT-23-5
1
2
3
Power Supply Input
Ground Terminal
Enable/Shutdown
- Logic high = enable
- Logic low = shutdown
Bypass - Fixed voltage option:
Reference bypass input for ultra-quiet operation. Connecting a 10nF cap on this pin reduces
output noise.
Adjustable Input – Adjustable voltage option:
Adjustable regulator feedback input. Connect to a resistive voltage-
Divider network.
Regulator Output Voltage
Description
BYP/ADJ
4
V
OUT
5
Name
ADJ
NC
GND
EN
V
IN
NC
NC
V
OUT
DFN-8
1
2
3
4
5
6
7
8
Description
Adjustable Input – Adjustable voltage option:
Adjustable regulator feedback input. Connect to a resistive voltage-
Divider network.
No Connect
Ground Terminal
Enable/Shutdown
- Logic high = enable
- Logic low = shutdown
Power Supply Input
No Connect
No Connect
Regulator Output Voltage
4/15
Rev. 2.0.1
SP6203 / SP6205
300mA/500mA Low Noise CMOS LDO Regulators
ORDERING INFORMATION
(1)
Part Number
SP6203EM5-L-2-8/TR
SP6205EM5-L/TR
SP6205EM5-L-3-0/TR
SP6205EM5-L-3-3/TR
SP6205ER-L/TR
NOTES:
1.
2.
Refer to
www.exar.com/SP6203
and
www.exar.com/SP6205
for most up-to-date Ordering Information.
Visit
www.exar.com
for additional information on Environmental Rating.
DFN8
-40°C≤T
A
≤+125°C
Yes
(2)
Ambient Temperature
Range
Lead-Free
Package
Packing Method
Voltage Option
2.8V
SOT-23-5
ADJ
Tape & Reel
3.0V
3.3V
ADJ
5/15
Rev. 2.0.1
