®
SP690T/S/R, SP802T/S/R,
SP804T/S/R, and SP805T/S/R
3.0V/3.3V Low Power Microprocessor
Supervisory with Battery Switch-Over
s
RESET and RESET Outputs
s
Reset asserted down to V
CC
= 1V
s
Reset Time Delay - 200ms
s
Watchdog Timer - 1.6 sec timeout
s
40µA Maximum V
CC
Supply Current
s
1µA Maximum Battery Supply Current
s
Power Switching
50mA Output in V
CC
Mode (1.5Ω)
10mA Output in Battery Mode (15Ω)
s
Battery Can Exceed V
CC
in Normal Operation
s
Precision Voltage Monitor for Power-Fail
or Low-Battery Warning
s
Available in 8 pin SO and DIP packages
s
Pin Compatible Upgrades to
MAX690T/S/R, MAX802T/S/R,
MAX804T/S/R, MAX805T/S/R
DESCRIPTION
The
SP690T/S/R, SP802T/S/R, SP804T/S/R
and
SP805T/S/R
devices are a family of
microprocessor (µP) supervisory circuits that integrate a myriad of components involved in
discrete solutions to monitor power-supply and battery-control functions in
µP
and digital
systems. The series will significantly improve system reliability and operational efficiency
when compared to discrete solutions. The features of the
SP690T/S/R, SP802T/S/R,
SP804T/S/R
and
SP805T/S/R
devices include a watchdog timer, a
µP
reset and backup-
battery switchover, and power-failure warning; a complete
µP
monitoring and watchdog
solution. The series is ideal for 3.0V or 3.3V applications in portable electronics, computers,
controllers, and intelligent instruments and is a solid match for designs where it is critical to
monitor the power supply to the
µP
and it’s related digital components. Refer to
Sipex's
SP690A/692A/802L/802M/805L/805M
series for similar devices designed for +5V systems.
Part Number
SP690T/805T
SP802T/804T
SP690S/805S
SP802S/804S
SP690R/805R
SP802R/804R
RESET
Active
LOW/HIGH
LOW/HIGH
LOW/HIGH
LOW/HIGH
LOW/HIGH
LOW/HIGH
RESET
Threshold
3.075V
3.075V
2.925V
2.925V
2.625V
2.625V
RESET
Accuracy
±75mV
±60mV
±75mV
±60mV
±75mV
±60mV
PFI
Accuracy
±4%
±2%
±4%
±2%
±4%
±2%
Watchdog
Input
YES
YES
YES
YES
YES
YES
Backup-Battery
Switch
YES
YES
YES
YES
YES
YES
SP690T/S/R JAN 30-06
SP690T/S/R, 802/T/S/R, 804T/S/R, 805T/S/R Low Power Microprocessor Supervisory
© 2006 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at
these ratings or any other above those indicated in the operation
sections of the specifications below is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect
reliability and cause permanent damage to the device.
V
CC
..................................................................................-0.3V to 6.0V
V
BATT
................................................................................-0.3V to 6.0V
All Other Inputs (NOTE 1).................................-0.3V to the higher of V
CC
or V
BATT
Continuous Input Current:
V
CC
..................................................................................100mA
V
BATT
..................................................................................20mA
GND..................................................................................20mA
WDI, PFI...........................................................................20mA
Continuous Output Current:
RESET, RESET, PFO.........................................................20mA
V
OUT
......................................................................................100mA
Power Dissipation per Package:
8pin NSOIC (derate 6.14mW/°C above +70°C)..............500mW
8pin PDIP (derate 11.8mW/°C above +70°C)..............1,000mW
Storage Temperature........................................-65°C to +160°C
Lead Temperature(soldering,10sec).............................................+300°C
ESD Rating........................................................4KV Human Body Model
SPECIFICATIONS
V
CC
= 3.17V to 5.50V for the SP690T/SP80_T, V
CC
= 3.02V to 5.50V for the SP690S/SP80_S, V
CC
= 2.72V to 5.50V for the SP690R/SP80_R, V
BATT
= 3.60V, and
T
A
= T
MIN
to T
MAX
unless otherwise noted. Typical values taken at T
AMB
= +25
O
C.
PARAMETERS
Operating Voltage Range,
V
CC
or V
BATTERY
, NOTE 1
V
CC
Supply Current, I
SUPPLY
V
CC
Supply Current in Battery
Backup Mode
V
BATTERY
Supply Current in
Any Mode, NOTE 2
V
BATTERY
Leakage Current, NOTE 3
V
BATTERY
Leakage Current, NOTE 4
Output Voltage, V
OUT
MIN.
1.0
TYP.
MAX.
5.5
UNITS CONDITIONS
Volts
25
20
0.4
0.001
-0.1
V
CC
- 0.03
V
CC
- 0.3
V
CC
- 0.0015
V
CC
- 0.0075
V
CC
- 0.075
V
CC
- 0.0003
40
40
1
0.5
0.02
µA
µA
µA
µA
µA
excluding I
OUT
V
CC
=2.0V,V
BATTERY
=2.3V,
excluding I
OUT
excluding I
OUT
3.3V > V
CC
>V
BATTERY
+ 0.2V
I = 5mA
I
OUT
= 50mA
I
OUT
= 250
µ
A, V
CC
> 2.5V
I
OUT
= 250µA, V
BATTERY
= 2.3V
I
OUT
= 1mA, V
BATTERY
= 2.3V
I
OUT
= 10mA, VB
ATTERY
= 3.3V
V
BATTERY
- V
CC
, V
SW
> V
CC
> 1.75V, NOTE 5
V
BATTERY
> V
CC
, NOTE 6
Values are identical to the Reset
Threshold values at V
CC
rising
V
V
OUT
in Battery-Backup Mode
V
BATTERY
- 0.02 V
BATTERY
- 0.0045
V
BATTERY
- 0.018
V
BATTERY
- 0.15
0.065
2.30
0.025
2.40
2.50
V
Battery Switch Threshold,
V
CC
falling
Battery Switch Threshold,
V
CC
rising, NOTE 7
V
V
SP690T/S/R JAN 30-06
SP690T/S/R, 802/T/S/R, 804T/S/R, 805T/S/R Low Power Microprocessor Supervisory
© 2006 Sipex Corporation
2
SPECIFICATIONS (continued)
V
CC
= 3.17V to 5.50V for the SP690T/SP80_T, V
CC
= 3.02V to 5.50V for the SP690S/SP80_S, V
CC
= 2.72V to 5.50V for the SP690R/SP80_R, V
BATT
= 3.60V, and
T
A
= T
MIN
to T
MAX
unless otherwise noted. Typical values taken at T
AMB
= +25
O
C.
PARAMETERS
MIN.
3.00
3.00
2 .8 5
2 .8 5
TYP.
3.075
3.085
2.925
2.935
2.625
2.635
3.075
3.085
2 .9 2 5
2 .9 3 5
2 .6 2 5
2 .6 3 5
200
V
CC
- 0.15
0.06
0.13
0.06
MAX.
3.15
3 .1 7
3.00
3.02
2 .7 0
2 .7 2
3 .1 2
3 .1 4
3 .0 0
3 .0 2
2.70
2.72
280
UNITS CONDITIONS
SP690T/805T, V
CC
falling
SP690T/805T, V
CC
rising
SP690S/805S, V
CC
falling
SP690S/805S, V
CC
rising
SP690R/805R, V
CC
falling
SP690R/805R, V
CC
rising
SP802T/804T, V
CC
falling
SP802T/804T, V
CC
rising
SP802S/804S, V
CC
falling
SP802S/804S, V
CC
rising
SP802R/804R, V
CC
falling
SP802R/804R, V
CC
rising
V
Reset Threshold, V
RST
NOTE 8
2 .5 5
2 .5 5
3.00
3.00
2 .8 8
2 .8 8
2 .5 9
2 .5 9
V
Reset Timeout Period, t
WP
RESET, PFO Output Voltage, V
OH
RESET, PFO Output Voltage, V
OL
RESET, PFO Output Voltage, V
OL
RESET Output Voltage, V
OL
RESET Output Leakage Current,
NOTE 11
Output Short to GND Current, I
OS
,
PFO and RESET
Watchdog Timeout, t
WD
WDI Pulse Width
WDI Input Threshold
V
IH
V
IL
WDI Input Current
PFI Input Threshold
PFI Input Current
PFI Hysteresis, V
PFH
140
V
CC
- 0.3
ms
V
I
SOURCE
= 30µA
I
SINK
= 1.2mA, SP690_/802_ where
V
CC
= V
RST
minimum
V
BATTERY
= 0V, V
CC
= 1.0V, I
SINK
= 40µA
I
SINK
= 1.2mA, SP804_/805_ where
V
CC
= V
RST
maximum
V
BATTERY
= 0V, V
CC
= V
RST
minimum,
V
RESET
= 0V or V
CC
V
CC
= 3.3V, V
OH
= 0V
V
CC
< 3.6V
0.30
0.30
0.30
-1
V
V
V
µA
µA
s
µs
-1
180
1.12
1.60
500
2.24
1
0.7 x V
CC
0.3 x V
CC
-1
1.200
1.225
-25
0.01
1 .2 5
1 .2 5
0 .0 1
10
1
1.300
1.275
25
20
V
µA
V
nA
mV
PFI rising, V
CC
< 3.6V
0V < V
CC
< 5.5V
SP690_/805_, V
CC
<3.6V, V
PFI
falling
SP802_/804_, V
CC
<3.6V, V
PFI
falling
SP690T/S/R JAN 30-06
SP690T/S/R, 802/T/S/R, 804T/S/R, 805T/S/R Low Power Microprocessor Supervisory
© 2006 Sipex Corporation
3
SPECIFICATIONS (continued)
V
CC
= 3.17V to 5.50V for the SP690T/SP80_T, V
CC
= 3.02V to 5.50V for the SP690S/SP80_S, V
CC
= 2.72V to 5.50V for the SP690R/SP80_R, V
BATT
= 3.60V, and
T
A
= T
MIN
to T
MAX
unless otherwise noted. Typical values taken at T
AMB
= +25
O
C.
NOTE 1:
The following are tested at V
BATT
= 3.6V and V
CC
= 5.5V: V
CC
supply current, watchdog
functionality, logic input leakage, PFI functionality, and the RESET and RESET states. The state of
RESET or RESET and PFO is tested at V
CC
= V
CC
(min).
NOTE 2:
Tested V
BATT
= 3.6V, V
CC
= 3.5V and 0V.
NOTE 3:
Leakage current into the battery is tested under the following worst-case conditions: V
CC
= 5.5V, V
BATT
= 1.8V and at V
CC
= 1.5V, V
BATT
= 1.0V.
NOTE 4:
"-" equals the battery-charging current, "+" equals the battery-discharging current.
NOTE 5:
When V
SW
> V
CC
> V
BATT
, V
OUT
remains connected to V
CC
until V
CC
drops below V
BATT
. The
V
CC
-to-V
BATT
comparator has a small 25mV typical hysteresis to prevent oscillation.
NOTE 6:
When V
BATT
> V
CC
> V
SW
, V
OUT
remains connected to V
CC
until V
CC
drops below the battery
switch threshold, V
SW
.
NOTE 7:
V
OUT
switches from V
BATT
to V
CC
when V
CC
rises above the reset threshold, independent of
V
BATT
. Switchover back to V
CC
occurs at the exact voltage that causes RESET to go HIGH (on the
SP804_ and SP805_ RESET goes LOW). Switchover occurs 200ms prior to reset.
NOTE 8:
The reset threshold tolerance is wider for V
CC
rising than for V
CC
falling to accommodate the
10mV typical hysteresis, which prevents internal oscillation.
NOTE 9:
SP690_ and SP802_ devices only.
NOTE 10:
SP804_ and SP805_ devices only.
NOTE 11:
The leakage current into or out of the RESET pin is tested with RESET asserted (RESET
output high impedance).
SP690T/S/R JAN 30-06
SP690T/S/R, 802/T/S/R, 804T/S/R, 805T/S/R Low Power Microprocessor Supervisory
© 2006 Sipex Corporation
4
INTERNAL BLOCK DIAGRAM
V
BATT
8
V
CC
2
BATTERY
SWITCHOVER
CIRCUIT
1
V
OUT
BATTERY
SWITCHOVER
COMPARATOR
1.25V
SP690T/S/R
SP802T/S/R
SP804T/S/R
SP805T/S/R
RESET
GENERATOR
7
RESET
COMPARATOR
RESET / RESET*
1.25V
WDI
6
WATCHDOG
TIMER
PFI
4
5
POWER-FAIL
COMPARATOR
PFO
1.25V
GND
3
*SP804T/S/R and SP805T/S/R only
SP690T/S/R JAN 30-06
SP690T/S/R, 802/T/S/R, 804T/S/R, 805T/S/R Low Power Microprocessor Supervisory
© 2006 Sipex Corporation
5
