SPN8882
N-Channel Enhancement Mode MOSFET
DESCRIPTION
The SPN8882 is the N-Channel logic enhancement mode
power field effect transistors are produced using high cell
density , DMOS trench technology. The SPN8882 has
been designed specifically to improve the overall
efficiency of DC/DC converters using either synchronous
or conventional switching PWM controllers. It has been
optimized for low gate charge, low R
DS(ON)
and fast
switching speed.
APPLICATIONS
Power Management in Note book
Powered System
DC/DC Converter
Load Switch
FEATURES
30V/40A,R
DS(ON)
= 10mΩ@V
GS
=10V
30V/40A,R
DS(ON)
= 14mΩ@V
GS
=4.5V
Super high density cell design for extremely low
RDS (ON)
Exceptional on-resistance and maximum DC
current capability
TO-252,TO-251 package design
PIN CONFIGURATION
TO-252
TO-251
PART MARKING
2007/07/20
Ver.2
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SPN8882
N-Channel Enhancement Mode MOSFET
PIN DESCRIPTION
Pin
1
2
3
ORDERING INFORMATION
Part Number
SPN8882T252R
SPN8882T251T
※
SPN8882T252RG : Tape Reel ; Pb – Free
※
SPN8882T251RG : Tube ; Pb – Free
Package
TO-252
TO-251
Part
Marking
SPN8882
SPN8882
Symbol
G
S
D
Description
Gate
Source
Drain
ABSOULTE MAXIMUM RATINGS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Drain-Source Voltage
Gate –Source Voltage
Continuous Drain Current
Pulsed Drain Current
Continuous Drain Current
Single Pulse Drain to Source Avalanche Energy
−
Starting
(T
J
=25°C , V
DD
=27V , V
GS
=10V , I
AS
=28A , L=0.1mH )
TO-252-2L
Power Dissipation
Operating Junction Temperature
Storage Temperature Range
Thermal Resistance-Junction to Ambient
T
A
=25℃
TO-251
T
A
=25℃
T
A
=100℃
Symbol
V
DSS
V
GSS
I
D
I
DM
I
S
E
AS
P
D
T
J
T
STG
R
θJA
Typical
30
±20
60
40
100
50
41
40
55
150
-55/150
100
Unit
V
V
A
A
A
mJ
W
℃
℃
℃
/W
2007/07/20
Ver.2
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SPN8882
N-Channel Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS
(TA=25
℃
Unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Leakage Current
Zero Gate Voltage Drain Current
Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Time
Turn-Off Time
Symbol
Conditions
Min.
Typ
Max.
Unit
V
(BR)DSS
V
GS
= 0V , I
D
=250uA
V
GS(th)
V
DS
= V
GS
,I
DS
=250uA
I
GSS
I
DSS
R
DS(on)
gfs
V
SD
V
DS
= 0V,V
GS
= ±20 V
V
DS
= 24V,V
GS
=0V
V
DS
= 24V,V
GS
=0V,
T
J
= 125C
V
GS
= 10V, I
D
= 35A
V
GS
= 4.5V, I
D
= 35A
V
DS
= 15V, I
D
=20 A
I
F
= 40 A,V
GS
= 0V
30
0.8
2.4
±100
1
100
0.008
0.012
10
1.0
1.5
0.010
0.014
V
nA
uA
Ω
S
V
Q
g
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
DS
= 15V,V
GS
= 5V,
I
D
=50 A
12
4
5
1500
320
200
8
20
nC
V
GS
= 0V, V
DS
= 25V,
F=1MHz
pF
12
15
30
9
ns
(V
DD
= 15 V,I
D
= 50 A,
V
GS
=10V,R
G
= 2.5Ω)
10
18
6
2007/07/20
Ver.2
Page 3
SPN8882
N-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
2007/07/20
Ver.2
Page 4
SPN8882
N-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
2007/07/20
Ver.2
Page 5
