SPP9547
P-Channel Enhancement Mode MOSFET
DESCRIPTION
The SPP9547 is the P-Channel logic enhancement mode
power field effect transistors are produced using high cell
density , DMOS trench technology.
This high density process is especially tailored to
minimize on-state resistance.
These devices are particularly suited for low voltage
application , notebook computer power management and
other battery powered circuits where high-side
switching .
APPLICATIONS
Power Management in Note book
Portable Equipment
Battery Powered System
DC/DC Converter
Load Switch
DSC
LCD Display inverter
FEATURES
-40V/-7.2A,R
DS(ON)
= 95mΩ@V
GS
=- 10V
-40V/-5.0A,R
DS(ON)
= 110mΩ@V
GS
=-4.5V
Super high density cell design for extremely low
RDS (ON)
Exceptional on-resistance and maximum DC
current capability
SOP – 8P package design
PIN CONFIGURATION(SOP – 8P)
PART MARKING
2008 / 07/ 10
Ver.2
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SPP9547
P-Channel Enhancement Mode MOSFET
PIN DESCRIPTION
Pin
1
2
3
4
5
6
7
8
Symbol
S
S
S
G
D
D
D
D
Description
Source
Source
Source
Gate
Drain
Drain
Drain
Drain
ORDERING INFORMATION
Part Number
SPP9547S8RGB
Package
SOP- 8P
Part
Marking
SPP9547
※
SPP9547S8RGB 13” Tape Reel ; Pb – Free ; Halogen – Free
ABSOULTE MAXIMUM RATINGS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Drain-Source Voltage
Gate –Source Voltage
Continuous Drain Current(T
J
=150
℃
)
Pulsed Drain Current
Continuous Source Current(Diode Conduction)
Power Dissipation
Operating Junction Temperature
Storage Temperature Range
Thermal Resistance-Junction to Ambient
T
A
=25℃
T
A
=70℃
T
A
=25℃
T
A
=70℃
Symbol
V
DSS
V
GSS
I
D
I
DM
I
S
P
D
T
J
T
STG
R
θJA
Typical
-40
±20
Unit
V
V
A
A
A
W
℃
℃
℃/W
-7.2
-5.0
-25
-2.3
2.8
1.8
-55/150
-55/150
70
2008 / 07/ 10
Ver.2
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SPP9547
P-Channel Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Leakage Current
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Time
Turn-Off Time
Symbol
Conditions
Min.
Typ
Max.
Unit
V
(BR)DSS
V
GS
=0V,I
D
=-250uA
V
GS(th)
V
DS
=V
GS
,I
D
=-250uA
I
GSS
I
DSS
I
D(on)
R
DS(on)
gfs
V
SD
Q
g
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
DD
=-15V,R
L
=15Ω
I
D
≡-1.0A,V
GEN
=-10V
R
G
=6Ω
V
DS
=-15V,V
GS
=0V
f=1MHz
V
DS
=0V,V
GS
=±20V
V
DS
=-36V,V
GS
=0V
V
DS
=-36V,V
GS
=0V
T
J
=85℃
V
DS
= -5V,V
GS
=-4.5V
V
GS
=-10V,I
D
=-7.2A
V
GS
=-4.5V,I
D
=-5.0A
V
DS
=-15V,I
D
=-5.7A
I
S
=-1.3A,V
GS
=0V
-40
-0.8
-2.5
±100
-1
-5
-10
0.082
0.095
13
-0.55
9
1.5
2.0
500
95
50
8
10
30
15
20
20
35
20
0.095
0.110
-1.0
12
V
nA
uA
A
Ω
S
V
V
DS
=-15V,V
GS
=-10V
I
D
= -3.5A
nC
pF
nS
2008 / 07/ 10
Ver.2
Page 3
SPP9547
P-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
2008 / 07/ 10
Ver.2
Page 4
SPP9547
P-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
2008 / 07/ 10
Ver.2
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