SPS-34-24T-HP-TDFA
Features
Simplex SC Connector, Integrated Diplexer Transceiver
SFP MSA, digital diagnostics SFF-8472 Compliant
Voice/Data FTTx ONT/ONU Applications
Compliant to FSAN G.984.5 Specifications
1244 Mbps Tx, 2488 Mbps Rx Asymmetric Data Rate
Burst Mode Transmission
TX Burst Mode Detection, TX_SD
RX Squelch
Operating case temperature: 0~70℃
28 dB link budget; Class B+, 20 km reach
Compliant to IEC-60825 Class 1 laser diode
RoHS compliant
Internal Calibration
Regulatory Compliance
Table 1 – Regulatory Compliance
Feature
Electrostatic Discharge
(ESD) to the Electrical Pins
Electrostatic Discharge (ESD) to the
Duplex LC Receptacle
Electromagnetic
Interference (EMI)
Immunity
Laser Eye Safety
RoHS
Note:
In light of item 5 in Annex of 2002/95/EC, “Pb in the glass of cathode ray tubes, electronic components and
fluorescent tubes.” and item 13 in Annex of 2005/747/EC, “Lead and cadmium in optical and filter glass.”,
the two exemptions are being concerned for Source Photonics transceivers, because Source Photonics
transceivers use glass, which may contain Pb, for components such as lenses, windows, isolators, and
other electronic components.
Standard
MIL-STD-883E
Method 3015.7
IEC 61000-4-2
GR-1089-CORE
FCC Part 15 Class B
EN55022 Class B (CISPR 22B)
VCCI Class B
IEC 61000-4-3
FDA 21CFR 1040.10 and 1040.11
EN60950, EN (IEC) 60825-1,2
2002/95/EC 4.1&4.2
2005/747/EC
Compatible with standards
Compatible with Class I laser
product.
Compliant with standards
note
Compatible with standards
Class
Performance
1(>500V
for
XFI
pins, >2000V for other pins.)
Compatible with standards
DS-6284 Rev 02 2011-08-12
SPS-34-24T-HP-TDFA
Absolute Maximum Ratings
Table 2 – Absolute Maximum Ratings
Parameter
Storage Temperature
Supply Voltage
Operating Relative Humidity
Symbol
T
S
V
CC_
Rx
V
CC_
Tx
RH
Min.
-40
-0.4
-0.4
5
Typical
-
-
-
-
Max.
+85
+4.2
V
CC_
Rx+1
95
Unit
°C
V
V
%
Notes
Recommended Operating Conditions
Table 3 – Recommended Operating Conditions
Symb
ol
T
C
V
CC
I
CC
P
D
BR
BR
TD
-40
3.14
-
-
-
-
-
-
3.30
-
-
1244.16
2488.32
-
85
3.46
350
1.3
-
-
20,000
°C
V
mA
W
Mbps
Mbps
m
Min.
Typical
Max.
Unit
Parameter
Operating Case Temperature
Operating Voltage
Total TX and RX Supply Current
Power Dissipation
Bit Rate(Tx)
Bit Rate(Rx)
Transmission Distance
Notes
Optical Characteristics
Table 4 – Optical Characteristics
Transmitter
Parameter
Center Wavelength Range
Average Output Power
Average Output Power (Laser Off)
Side Mode Suppression Ratio
Spectral Width (-20dB)
Extinction Ratio
Optical Rise and Fall Time(20%-80%)
Jitter Generation
Transmitter Output Eye
Center Wavelength Range
λ
C
Symbol
λ
C
P
0UT
P
0UT-OFF
SMSR
λ
20
ER
T
R
/T
F
JG
Min.
1290
0.5
-
30
-
10
-
-
Receiver
1480
1490
1500
nm
Typical
1310
-
-
-
-
-
-
-
Max.
1330
5
-45
-
1
-
250
0.2
Unit
nm
dBm
dBm
dB
nm
dB
ps
UI
2
1
Notes
Compliant with G.984.2 Figure 3
DS-6284 Rev 02 2011-08-12
SPS-34-24T-HP-TDFA
Received Optical Power
Signal Detect Assertion Level
Signal Detect De-Assertion Level
Hysteresis
RSSI Accuracy(room temperature)
1310nm Tx to 1490nm Rx Crosstalk
1555nm Rx to 1490nm Isolation
G.984.5 Wavelength Blocking Filter
Isolation
Notes:
1.
2.
3.
P
in
SDA
SDD
P
SDA-SDD
RSSI
-27
-
-45
0.5
-3
-
30
7
7
22
22
-
-
-
-
-
-
-
-8
-29
-
-
+3
-47
-
dBm
dBm
dBm
dB
dB
dB
dB
dB,
1441 nm to 1450 nm
dB,
1530 nm to 1539 nm
dB,
1400 nm to 1441 nm
dB,
1539 nm to 1625 nm
3
-
-
Measured with a PRBS 2
23
-1, NRZ, 50% duty cycle.
4kHz to 10MHz
Measured with a PRBS 2
31
-1, 50% duty cycle.
Electrical Characteristics
Table 5 – Electrical Characteristics
Transmitter
Parameter
Differential Data Input Voltage
Input Differential Impedance
Tx Burst Enable Time
Tx Burst Disable Time
Differential Output Voltage
Signal Detect Output HIGH Voltage
Signal Detect Output LOW Voltage
Data Output Rise and Fall Time
TX_SD timing “D”
TX_SD timing “X”
TX_SD Startup Time
Notes:
4.
5.
6.
7.
8.
9.
TXD+/-. DC-coupled.
TXD+/-.
16 bits data @1244Mbps
CML output, AC coupled(0.1µF)
LVTTL with internal 1k
Ω
pull up resistor. Asserts HIGH when input data amplitude is above threshold.
LVTTL. De-asserts LOW when input data amplitude is below threshold.
V
SD_High
V
SD_Low
T
R
/T
F
Ttx_sd-d
Ttx-sd_x
Ttx_sd-startup
Symbol
V
IN,P-P
Z
IN
T
BURST_EN
T
BURST_DIS
Receiver
300
2.4
0
-
-
-
-
-
-
-
-
-
-
-
1200
-
0.4
160
1000
350
3
mV
V
V
ps
nS
nS
S
10
10
10
7
8
9
Min.
300
-
-
-
Typical
-
100
-
-
Max.
1800
-
12.86
12.86
Unit
mVpp
Ω
ns
ns
Notes
4
5
6
6
10. TX_SD Timing diagram and TX_SD Startup timing diagram are as follows:
DS-6284 Rev 02 2011-08-12
SPS-34-24T-HP-TDFA
Figure 1, TX_SD Timing diagram
Figure 2, TX_SD Startup Timing diagram
DS-6284 Rev 02 2011-08-12
SPS-34-24T-HP-TDFA
Recommended Interface Circuit
Figure 3, Recommended Interface Circuit
Note A: Output stage in SerDes IC is LVPECL output, R1=130ohm, R2=82ohm, R3=N.C.
Output stage in SerDes IC is CML output, R1=N.C., R3=100ohm.
Note B: CML output, AC coupled internally.
Input stage in SerDes IC is LVPECL input, R4=82ohm, R5=130ohm
Input stage in SerDes IC is CML input, R4=R5=N.C.
DS-6284 Rev 02 2011-08-12
