OVERDRIVE-PROTECTED WIDEBAND OP AMP
General Description
The SPT205 is a wideband overdrive-protected operational
amplifier designed for applications needing both speed and low
power operation. Utilizing a well-established current feedback
architecture, the SPT205 exhibits performance far beyond that
of conventional voltage feedback op amps. For example, the
SPT205 has a bandwidth of 170MHz at a gain of +20 and
settles to 0.1% in 22ns. Plus, the SPT205 has a combination of
important features not found in other high-speed op amps.
For example, the SPT205 has been designed to consume little
power – 570mW at
±15V
supplies. The result is lower power
supply requirements and less system-level heat dissipation. In
addition, the device can be operated on supply voltages as low
as
±5V
for even lower power dissipation.
Complete overdrive protection has been designed into the part.
This is critical for applications, such as ATE and instrumentation,
which require protection from signal levels high enough to cause
saturation of the amplifier. This feature allows the output of the
op amp to be protected against short circuits using techniques
developed for low-speed op amps. With this capability, even the
fastest signal sources can feature effective short circuit protec-
tion.
The SPT205 is constructed using thin film resistor/bipolar
transistor technology, and is available in the following versions:
SPT205AIH -25 to +85
°C
12-pin TO-8 can
SPT205AMH -55 to +125
°C
12-pin TO-8 can, features
burn-in and hermetic testing
Typical Performance
Gain Setting
Parameter
+7 +20 +50 -1 -20 -50
Units
Bandwidth (-3 dB)
Rise time
Slew Rate
220 170 80 220 130 80
1.7
2.4
2.2 4.7 1.7 2.9 4.7
2.4 2.4 2.4 2.4 2.4
19
MHz
ns
V/ns
ns
Bottom View
Features
s
s
s
s
s
s
s
-3dB bandwidth of 170MHz
0.1% settling in 22ns
Complete overdrive protection
Low power: 570mW (190mW at
±5V)
3MΩ input resistance
Output may be current limited
Direct replacement for CLC205
Fast, precision A/D conversion
Automatic test equipment
Input/output amplifiers
Photodiode, CCD preamps
IF processors
High-speed modems, radios
Line drivers
Large Signal Pulse Response
A
v
= +20
Applications
s
s
s
s
s
s
s
Output Voltage (2V/div)
A
v
= -20
Time (5ns/div)
205 Plot8
Settling Time (to 0.1%) 22 22 20 21 20
Package Dimensions
4755 Forge Road, Colorado Springs, Colorado 80907, USA
Phone: (719) 528-2300 FAX: (719) 528-2370 Website: http://www.spt.com E-Mail: sales@spt.com
SPT205 Electrical Characteristics
PARAMETERS
Ambient Temperature
Ambient Temperature
FREQUENCY DOMAIN RESPONSE
¦
-3dB bandwidth
large-signal bandwidth
gain flatness
¦
peaking
peaking
rolloff
group delay
linear phase deviation
TIME DOMAIN RESPONSE
rise and fall time
¦
¦
(A
v
= +20V, V
CC
=
±15V,
R
L
= 200Ω, R
f
= 2kΩ; unless specified)
TYP
+25°C
+25°C
170
100
0
0
–
3.0
±
.2
0.8
2.2
4.8
22
24
7
2.4
-57
-68
2.1
22
4.8
-157
39
-157
39
3.5
11
3.0
15
2.0
20
69
60
19
3.0
5.0
–
±12
–
–
2.2
MIN & MAX RATINGS
-25°C
+25°C
+85°C
-25°C
+25°C
+85°C
>140
>72
<0.3
<0.5
<0.8
–
<3.0
<2.6
<5.5
<27
<30
<14
>1.8
<-50
<-55
<3.0
<30
<6.5
<-154
<55
<-154
<55
<8.0
<25
<25
<100
<22
<150
>55
>50
<20
>1.0
<7.0
<0.1
>±11
–
–
<3.0
>140
>80
<0.3
<0.5
<0.8
–
<2.0
<2.6
<5.5
<27
<30
<14
>2.0
<-50
<-55
<3.0
<30
<6.5
<-154
<55
<-154
<55
<8.0
<25
<15
<100
<10
<150
>55
>50
<20
>1.0
<7.0
<0.1
>±11
<0.2
-100
±40
<3.0
>125
>80
<0.5
<0.8
<0.8
–
<3.0
<3.0
<5.5
<27
<30
<14
>2.0
<-50
<-55
<3.5
<35
<7.5
<-153
<61
<-153
<61
<11.0
<25
<15
<100
<25
<150
>55
>50
<22
>1.0
<7.0
<0.1
>±11
–
–
<3.2
UNITS
SYM
CONDITIONS
SPT205AIH
SPT205AMH
V
o
= <2V
pp
V
o
= <10V
pp
V
o
= <2V
pp
0.1 to 35MHz
>35MHz
at 70MHz
to 70MHz
to 70MHz
2V step
10V step
10V step, note 2
10V step, note 2
5V step
20V
pp
at 50MHz
2V
pp
, 20MHz
2V
pp
, 20MHz
>100kHz
>100kHz
>100kHz
>100kHz
1kHz to 150MHz
>5MHz
5MHz to 150MHz
MHz
MHz
dB
dB
dB
ns
°
ns
ns
ns
ns
%
V/ns
dBc
dBc
nV/√Hz
pA/√Hz
pA/√Hz
dBm(1Hz)
µV
dBm(1Hz)
µV
mV
µV/°C
µΑ
nA/°C
µA
nA/°C
dB
dB
mA
MΩ
pF
Ω
V
%
ppm/°C
mA
SSBW
FPBW
GFPL
GFPH
GFR
GD
LPD
TRS
TRL
TS
TSP
OS
SR
HD2
HD3
VN
ICN
NCN
SNF
INV
SNF
INV
VIO
DVIO
IBN
DIBN
IBI
DIBI
PSRR
CMRR
ICC
RIN
CIN
RO
VO
RFA
RFTC
ICL
settling time to 0.1%
to 0.05%
overshoot
slew rate
NOISE AND DISTORTION RESPONSE
¦
2nd harmonic distortion
¦
3rd harmonic distortion
equivalent input noise
voltage
inverting current
non-inverting current
noise floor
integrated noise
noise floor
integrated noise
STATIC, DC PERFORMANCE
* input offset voltage
average temperature coefficient
* input bias current
average temperature coefficient
* input bias current
average temperature coefficient
* power supply rejection ratio
common mode rejection ratio
* supply current
MISCELLANEOUS PERFORMANCE
non-inverting input resistance
non-inverting input capacitance
output impedance
output voltage range
internal feedback resistor
absolute tolerance
temperature coefficient
inverting input current self limit
non-inverting
inverting
no load
DC
70MHz
DC
no load
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
Absolute Maximum Ratings
V
CC
I
o
common mode input voltage
differential input voltage
thermal resistance
operating temperature
storage temperature
lead temperature (soldering 10s)
±20V
±75mA
±(|V
CC
| -1)V
±3V
(see thermal model)
AI: -25°C to +85°C
AM: -55°C to +125°C
-65°C to +150°C
+300°C
Recommended Operating Conditions
V
CC
I
o
common mode input voltage
gain range
note 1:
±5V
to
±15V
±50mA
±(|V
CC
| -5)V
+7 to +50, -1 to -50
note 2:
* AI, AM 100% tested at +25°C
¦
AM
100% tested at +25°C and sample tested
at -55°C and +125°C
¦
AI
sample tested at +25°C
Settling time specifications require the use of an
external feedback resistor (2Ω)
2
SPT205
10/9/98
SPT205 Typical Performance Characteristics
(T
A
= +25
°
C, A
v
= +20, V
CC
=
±
15V, R
L
= 200Ω; unless specified)
Non-Inverting Frequency Response
Inverting Frequency Response
Normalized Magnitude (1dB/div)
Frequency Response vs. External R
f
A
v
= +50
R
f
= 1.5kΩ
R
f
= 2kΩ
R
f
= 3kΩ
R
f
= 1.5kΩ
A
v
= +20
R
f
= 3kΩ
R
f
= 2kΩ
Normalized Magnitude (1dB/div)
Gain
A
v
= +20
A
v
= +50
Phase
A
v
= +50
A
v
= +20
A
v
= +7
A
v
= -7
Phase
A
v
= -50
A
v
= -20
A
v
= -7
A
v
= -50
A
v
= -20
A
v
= -1
Relative Gain (5dB/div)
A
v
= +7
Gain
A
v
= -1
Phase (45°/div)
Phase (45°/div)
R
f
= 1.5kΩ
R
f
= 2kΩ
A
v
= +7
R
f
= 3kΩ
0
20
40
60
80 100 120 140 160 180 200
0
20
40
60
80 100 120 140 160 180 200
0
20
40
60
80 100 120 140 160 180 200
Frequency (MHz)
Frequency (MHz)
Relative Bandwidth vs. V
CC
1.0
0.9
Gain
Frequency (MHz)
Gain and Phase for Various Loads
R
L
= 50Ω
R
L
= 100Ω
R
L
= 200Ω
R
L
= 1kΩ
Large Signal Gain and Phase
V
o
= 10V
pp
Magnitude (1dB/div)
Gain
0.8
0.7
0.6
0.5
0.4
0.3
0.2
4
6
8
10
12
14
16
Magnitude (1dB/div)
Relative Bandwidth
Phase (45°/div)
Phase (45°/div)
Phase
Phase
R
L
= 1kΩ
R
L
= 200Ω
R
L
= 100Ω
R
L
= 50Ω
0
15
30
45
60
75
90 105 120 135 150
0
20
40
60
80 100 120 140 160 180 200
Frequency (MHz)
Small Signal Pulse Response
±V
CC
(V)
Frequency (MHz)
Settling Time
0.20
0.15
10V step
R
f
= 2kΩ (external)
Large Signal Pulse Response
A
v
= +20
Output Voltage (0.4V/div)
Output Voltage (2V/div)
A
v
= +20
Settling Error (%)
A
v
= -20
0.10
0.05
0
-0.05
-0.10
-0.15
-0.20
A
v
= -20
Time (5ns/div)
Time (5ns/div)
Time (5ns/div)
2nd and 3rd Harmonic Distortion
-30
-35
-40
V
o
= 2V
pp
2-Tone 3rd Order Intermodulation Intercept
45
40
CMRR and PSRR
100
PSRR and CMRR (dB)
80
PSRR
Distortion (dBc)
-45
-50
-55
-60
-65
-70
-75
-80
1
10
100
3rd
2nd
Intercept (dBm)
35
30
25
20
0
20
40
60
80
100
60
40
20
0
CMRR
100
1k
10k
100k
1M
10M
100M
Frequency (MHz)
Frequency (MHz)
100
T
case
Frequency (Hz)
Equivalent Input Noise
100
Noise Voltage (nV/√Hz)
Noise Current (pA/√Hz)
200°C/W
T
j(pnp)
P
pnp
200°C/W
T
j(npn)
P
npn
17.5
°
C/W
T
j(circuit)
P
circuit
+
-
θ
ca
Inverting Current 18.3 pA/√Hz
10
10
T
ambient
Non-Inverting Current 2.5 pA/√Hz
Voltage 1.8 nV/√Hz
0
100
1k
10k
100k
1M
100
0
100M
Frequency (Hz)
3
SPT205
10/9/98
Current Feedback Amplifiers
Some of the key features of current feedback technology
are:
s
Independence of AC bandwidth and voltage gain
s
Adjustable frequency response with feedback resistor
s
High slew rate
s
Fast settling
Current feedback operation can be described using a simple
equation. The voltage gain for a non-inverting or inverting
current feedback amplifier is approximated by Equation 1.
V
o
A
v
=
V
in
1
+
R
f
Z
(
j
ω
)
Short Circuit Protection
Damage caused by short circuits at the output may be
prevented by limiting the output current to safe levels. The
most simple current limit circuit calls for placing resistors
between the output stage collector supplies and the
output stage collectors (pins 12 and 10). The value of this
resistor is determined by:
V
R
C
=
C
−
R
I
I
I
Equation 1
where I
I
is the desired limit current and R
I
is the minimum
expected load resistance (0Ω for a short to ground).
Bypass capacitors of 0.01µF on should be used on the
collectors as in Figures 2 and 3.
+15V
3.9
33Ω
.1
6
1
12
8
10
3,7
9
11
where:
A
v
is the closed loop DC voltage gain
s
R
f
is the feedback resistor
s
Z(jω) is the SPT205’s open loop transimpedance
gain
s
s
Capactance in
µF
.01
V
in
R
i
50Ω
R
g
+
-
SPT205
5
V
o
200Ω
Z
(
j
ω
)
is the loop gain
R
f
The denominator of Equation 1 is approximately equal to
1 at low frequencies. Near the -3dB corner frequency, the
interaction between R
f
and Z(jω) dominates the circuit
performance. The value of the feedback resistor has a
large affect on the circuits performance. Increasing R
f
has
the following affects:
s
s
s
s
s
-15V
3.9
.1
33Ω
.01
R
f
R
g
R
f
= 2000Ω (internal)
A
v
=
1
+
Figure 2: Recommended Non-Inverting Gain Circuit
+15V
3.9
33Ω
.1
50Ω
6
R
g
5
R
i
-15V
3.9
.1
1
12
8
10
3,7
9
11
Capactance in
µF
.01
Decreases loop gain
Decreases bandwidth
Reduces gain peaking
Lowers pulse response overshoot
Affects frequency response phase linearity
+
-
SPT205
V
o
200Ω
V
in
Overdrive Protection
Unlike most other high-speed op amps, the SPT205 is not
damaged by saturation caused by overdriving input
signals (where V
in
x gain > max. V
o
). The SPT205 self
limits the current at the inverting input when the output is
saturated (see the inverting input current self limit
specification); this ensures that the amplifier will not be
damaged due to excessive internal currents during overdrive.
For protection against input signals which would exceed
either the maximum differential or common mode input
voltage, the diode clamp circuits below may be used.
differential protection
V
in
33Ω
.01
A
v
=
-R
f
R
g
R
f
= 2000Ω (internal)
For Z
in
= 50Ω, select R
g
||R
i
= 50Ω
Figure 3: Recommended Inverting Gain Circuit
A more sophisticated current limit circuit which provides a
limit current independent of R
I
is shown in Figure 4 on
page 5.
With the component values indicated, current limiting
occurs at 50mA. For other values of current limit (I
I
), select
R
C
to equal V
be
/l
I
. Where V
be
is the base to emitter
voltage drop of Q3 (or Q4) at a current of [2V
CC
– 1.4] / R
x
,
where R
x
≤
[(2V
CC
– 1.4) / I
I
]
B
min
. Also, B
min
is the minimum beta of Q1 (or Q2) at a
current of I
I
. Since the limit current depends on V
be
, which
is temperature dependent, the limit current is likewise
temperature dependent.
+
SPT205
V
o
-V
cc
R
g
+V
cc
-
common mode
protection
Figure 1: Diode Clamp Circuits for Common Mode
and Differential Mode Protection
SPT205
10/9/98
4
+V
cc
R
c
12Ω
Q1
(MJE170)
0.01ΩF
Q3
(2N3906)
R
R
2
V
2
R
2
i
2
F
=
10 log
1
+
s
+
s
⋅
i
n
+
n
+
2f i 2
2
R
n
4kT
R
p
R
p
A
v
where R
p
+
R
s
R
n
;
R
s
+
R
n
A
v
=
R
f
+
1
R
g
to pin 12
to pin 10
0.01ΩF
R
x
14.3kΩ
Figure 5: Noise Figure Diagram and Equations
(Noise Figure is for the Network Inside this Box.)
Driving Cables and Capacitive Loads
When driving cables, double termination is used to
prevent reflections. For capacitive load applications, a
small series resistor at the output of the SPT205 will
improve stability and settling performance.
Transmission Line Matching
One method for matching the characteristic impedance
(Z
o
) of a transmission line or cable is to place the
appropriate resistor at the input or output of the amplifier.
Figure 6 shows typical inverting and non-inverting circuit
configurations for matching transmission lines.
R
1
V
1
+
-
R
4
V
2
+
-
Z
0
Z
0
R
3
R
2
R
g
R
5
C
6
+
Q2
(MJE180)
R
c
12Ω
-V
cc
Q4
(2N3904)
Figure 4: Active Current Limit Circuit (50mA)
Controlling Bandwidth and Passband Response
In most applications, a feedback resistor value of 2kΩ
will provide optimum performance; nonetheless, some
applications may require a resistor of some other value.
The response versus R
f
plot on the previous page shows
how decreasing R
f
will increase bandwidth (and frequency
response peaking, which may lead to instability). Con-
versely, large values of feedback resistance tend to roll off
the response.
The best settling time performance requires the use of an
external feedback resistor (use of the internal resistor
results in a 0.1% to 0.2% settling tail). The settling
performance may be improved slightly by adding a ca-
pacitance of 0.4pF in parallel with the feedback
resistor (settling time specifications reflect performance
with an external feedback resistor but with no external
capacitance).
Noise Analysis
Approximate noise figure can be determined for the
SPT205 using the
Equivalent Input Noise
plot on page 3
and the equations shown below.
kT = 4.00 x 10
-21
Joules at 290°K
V
n
is spot noise voltage (V/√Hz)
i
n
is non-inverting spot noise current (A/√Hz)
i
i
is inverting spot noise current (A/√Hz)
Z
0
R
6
SPT205
-
V
o
R
7
R
f
Figure 6: Transmission Line Matching
Non-inverting gain applications:
s
s
s
Connect R
g
directly to ground.
Make R1, R2, R6, and R7 equal to Zo.
Use R
3
to isolate the amplifier from reactive
loading caused by the transmission line,
or by parasitics.
Inverting gain applications:
s
s
s
Connect R
3
directly to ground.
Make the resistors R
4
, R
6
, and R
7
equal to Z
o
.
Make R
5
II R
g
= Z
o
.
The input and output matching resistors attenuate the
signal by a factor of 2, therefore additional gain is needed.
Use C
6
to match the output transmission line over a
greater frequency range. C
6
compensates for the increase
of the amplifier’s output impedance with frequency.
Dynamic Range (Intermods)
For RF applications, the SPT205 specifies a third
order intercept of 30dBm at 60MHz and P
o
= 10dBm.
A
2-Tone, 3rd Order IMD Intercept
plot is found in
the
Typical Performance Characteristics
section.
The output power level is taken at the load. Third-order
harmonic
distortion
is
calculated
with
the
formula:
HD3
rd
= 2
•
(IP3
o
– P
o
)
SPT205
10/9/98
R
s
R
n
+
SPT205
R
o
-
R
f
R
g
5
