SSF13N50
Main Product Characteristics
V
DSS
R
DS
(on)
I
D
500V
0.39Ω(typ.)
13A
TO-220
Marking and Pin
Assignment
Schematic Diagram
Features and Benefits:
Advanced Process Technology
Special designed for PWM, load switching and
general purpose applications
Ultra low on-resistance with low gate charge
Fast switching and reverse body recovery
150℃ operating temperature
Description
These N-Channel enhancement mode power field effect transistors are produced using silikron
proprietary MOSFET technology. This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching performance, and withstand high energy
pulse in the avalanche and commutation mode. These devices are well suited for high efficiency
switch mode power supplies.
Absolute Max Rating
Symbol
I
D
@ TC = 25°
C
I
D
@ TC = 100°
C
I
DM
P
D
@TC = 25°
C
V
DS
V
GS
E
AS
I
AS
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V①
Continuous Drain Current, V
GS
@ 10V①
Pulsed Drain Current②
Power Dissipation③
Linear Derating Factor
Drain-Source Voltage
Gate-to-Source Voltage
Single Pulse Avalanche Energy @ L=4.5mH
Avalanche Current @ L=4.5mH
Operating Junction and Storage Temperature Range
Max.
13
8
52
166
1.33
500
± 30
753
18.3
-55 to +150
W
W/°
C
V
V
mJ
A
°
C
A
Units
©
Silikron Semiconductor CO.,LTD.
2013.12.09
www.silikron.com
Version : 1.1
page 1 of 8
SSF13N50
Thermal Resistance
Symbol
R
θJC
R
θJA
Characteristics
Junction-to-case③
Junction-to-ambient (t
≤ 10s)
④
Junction-to-Ambient (PCB mounted, steady-state)
④
Typ.
—
—
—
Max.
0.75
62
40
Units
℃/W
℃/W
℃/W
Electrical Characteristics
@T
A
=25℃
unless otherwise specified
Symbol
V
(BR)DSS
R
DS(on)
Parameter
Drain-to-Source breakdown voltage
Static Drain-to-Source on-resistance
Min.
500
—
—
2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ.
—
0.39
0.91
—
2.1
—
—
—
—
40
11
14
16
27
46
33
1491
203
2.1
Max.
—
0.48
—
4
—
1
50
100
-100
—
—
—
—
—
—
—
—
—
—
pF
V
GS
= 0V
V
DS
= 25V
ƒ = 1MHz
nS
V
GS
=10V, V
DS
=250V,
R
GEN
=9.6Ω, I
D
=11A
nC
Units
V
Ω
Conditions
V
GS
= 0V, ID = 250μA
V
GS
=10V,I
D
= 6.6A
T
J
= 125℃
V
DS
= V
GS
, I
D
= 250μA
T
J
= 125℃
V
DS
= 500V,V
GS
= 0V
T
J
= 125℃
V
GS
=30V
V
GS
= -30V
I
D
= 11A,
V
DS
=400V,
V
GS
= 10V
V
GS(th)
Gate threshold voltage
V
μA
I
DSS
Drain-to-Source leakage current
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Gate-to-Source forward leakage
Total gate charge
Gate-to-Source charge
Gate-to-Drain("Miller") charge
Turn-on delay time
Rise time
Turn-Off delay time
Fall time
Input capacitance
Output capacitance
Reverse transfer capacitance
nA
Source-Drain Ratings and Characteristics
Symbol
I
S
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Min.
—
—
—
—
—
Typ.
—
—
0.86
400
2.7
Max.
13
Units
A
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
I
S
=11A, V
GS
=0V
T
J
= 25° I
F
=11A,
C,
di/dt = 100A/μs
I
SM
V
SD
t
rr
Q
rr
52
1.4
—
—
A
V
ns
μc
©
Silikron Semiconductor CO.,LTD.
2013.12.09
www.silikron.com
Version : 1.1
page 2 of 8
SSF13N50
Test circuits and Waveforms
EAS Test Circuit:
Gate charge test circuit:
Switching Time Test Circuit:
Switching Waveforms:
Notes:
①Calculated
continuous current based on maximum allowable junction temperature.
②Repetitive
rating; pulse width limited by max. junction temperature.
③The
power dissipation PD is based on max. junction temperature, using junction-to-case thermal
resistance.
④The
value of
R
θJA
is measured with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a
still air environment with TA =25°
C
©
Silikron Semiconductor CO.,LTD.
2013.12.09
www.silikron.com
Version : 1.1
page 3 of 8
SSF13N50
Typical electrical and thermal characteristics
Figure 1: Typical Output Characteristics
Figure 2. Gate to source cut-off voltage
Figure 3. Drain-to-Source Breakdown Voltage Vs.
Case Temperature
Figure 4: Normalized On-Resistance Vs. Case
Temperature
©
Silikron Semiconductor CO.,LTD.
2013.12.09
www.silikron.com
Version : 1.1
page 4 of 8
SSF13N50
Typical electrical and thermal characteristics
Figure 5. Maximum Drain Current Vs. Case
Temperature
Case Temperature
Figure 6.Typical Capacitance Vs. Drain-to-Source
Voltage
Figure8. Maximum Effective Transient Thermal Impedance,
Junction-to-Case
©
Silikron Semiconductor CO.,LTD.
2013.12.09
www.silikron.com
Version : 1.1
page 5 of 8
