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SSG9975

N-Channel Enhancement Mode Power Mos.FET

厂商名称:SECOS

厂商官网:http://www.secosgmbh.com/

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SSG9975
Elektronische Bauelemente
7.6A, 60V,R
DS(ON)
21m
Ω
N-Channel Enhancement Mode Power Mos.FET
SOP-8
Description
0.40
0.90
0.19
0.25
The SSG9975 provide the designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
45
6.20
5.80
0.25
o
0.375 REF
3.80
4.00
0.35
0.49
1.27Typ.
4.80
5.00
0.10~0.25
Features
*
RoHS Compliant
*
Lower On-Resistance
*
High Breakdown Voltage
Date Code
0
o
8
o
1.35
1.75
Dimensions in millimeters
D1
8
D1
7
D2
6
D2
5
D1
D2
9 975
SS
G1
1
S1
2
G1
3
S2
4
G2
G2
S1
S2
Absolute Maximum Ratings
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current, V
GS
@10V
Continuous Drain Current, V
GS
@10V
Pulsed Drain Current
1
3
3
Symbol
V
DS
V
GS
I
D
@T
A
=25
C
I
D
@T
A
=70
C
I
DM
P
D
@T
A
=25
C
o
o
o
Ratings
60
±
25
7.6
6.1
30
2
0.016
Unit
V
V
A
A
A
W
W/ C
o
o
Total Power Dissipation
Linear Derating Factor
Operating Junction and Storage Temperature Range
Tj, Tstg
-55~+150
C
Thermal Data
Parameter
Thermal Resistance Junction-ambient
3
Symbol
Max.
Rthj-a
Ratings
62.5
o
Unit
C /W
http://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 1 of
4
SSG9975
Elektronische Bauelemente
7.6A, 60V,R
DS(ON)
21m
Ω
N-Channel Enhancement Mode Power Mos.FET
Electrical Characteristics( Tj=25
o
C Unless otherwise specified)
Parameter
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Gate Threshold Voltage
Gate-Source Leakage Current
Drain-Source Leakage Current (Tj=25
o
C
)
Drain-Source Leakage Current (Tj=70
C
)
Static Drain-Source On-Resistance
2
o
Symbol
BV
DSS
BV
DS
/ Tj
V
GS(th)
I
GSS
I
DSS
Min.
60
_
Typ.
_
Max.
_
_
Unit
V
V/
o
C
V
nA
uA
uA
Test Condition
V
GS
=0V, I
D
=250uA
Reference to 25
o
C, I
D
=1mA
V
DS
=V
GS,
I
D
=250uA
V
GS
=
±
25V
V
DS
=60V,V
GS
=0
V
DS
=48V,V
GS
=0
V
GS
=10V, I
D
=7A
V
GS
=4.5V, I
D
=5A
0.06
_
_
_
_
_
_
1.0
_
_
_
_
3.0
±
100
1
25
21
27
40
_
_
R
DS(ON)
Qg
Qgs
Qgd
Td
(ON)
Tr
Td
(Off)
Tf
Ciss
Coss
Crss
Gfs
_
_
_
_
_
_
_
_
_
_
_
m
Ω
Total Gate Charge
2
26
6
14
14
7
40
13
2320
200
170
12
Gate-Source Charge
Gate-Drain ("Miller") Charge
Turn-on Delay Time
2
Rise Time
Turn-off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Forward Transconductance
nC
I
D
=7 A
V
DS
=48V
V
GS
=4.5 V
_
_
_
_
V
DD
=30V
I
D
=1A
nS
V
GS
=10V
R
G
=3.3
Ω
R
D
=30
Ω
3700
_
_
pF
V
GS
=0V
V
DS
= 25V
f=1.0MHz
_
_
S
V
DS
=10V, I
D
=7A
Source-Drain Diode
Parameter
Forward On Voltage
2
Symbol
V
SD
Min.
_
_
Typ.
_
Max.
1.2
_
Unit
V
Test Condition
I
S
=1.7A, V
GS
=0V.
Is=7A, V
GS
=0V
dl/dt=100A/us
Reverse Recovery Time
2
Trr
Qrr
34
nS
Reverse Recovery Charge
_
48
_
nC
Notes: 1.Pulse width limited by Max. junction temperature.
2.Pulse width
300us, dutycycle
2%.
3.Surface mounted on 1 inch
2
copper pad of FR4 board;135
°C/W
when mounted on min. copper pad.
http://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 2 of
4
SSG9975
Elektronische Bauelemente
7.6A, 60V,R
DS(ON)
21m
Ω
N-Channel Enhancement Mode Power Mos.FET
Characteristics Curve
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
http://www.SeCoSGmbH.com/
Fig 5. Forward Characteristics of
Reverse Diode
Fig 6. Gate Threshold Voltage v.s.
Junction Temperature
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page
3
of
4
SSG9975
Elektronische Bauelemente
7.6A, 60V,R
DS(ON)
21m
Ω
N-Channel Enhancement Mode Power Mos.FET
GND
Description
Typically a large storage capacitor is connected from this pin to ground to insure that the input
1.3V
or open= output enable.
NC
tage does not sag below the minimum dropout voltage during the load
V higher than Vout in order for the device to
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
Fig 11. Switching Time Waveform
Fig 12. Gate Charge Waveform
http://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page
4
of
4
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