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SSM3J120TU(T5L,T)

MOSFET P-Ch FET Mosfet 1.5V -20Vds +8V

器件类别:半导体    分立半导体   

厂商名称:Toshiba(东芝)

厂商官网:http://toshiba-semicon-storage.com/

器件标准:

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器件参数
参数名称
属性值
Product Attribute
Attribute Value
制造商
Manufacturer
Toshiba(东芝)
产品种类
Product Category
MOSFET
RoHS
Details
技术
Technology
Si
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
UFM-3
Number of Channels
1 Channel
Transistor Polarity
P-Channel
Vds - Drain-Source Breakdown Voltage
- 20 V
Id - Continuous Drain Current
- 4 A
Rds On - Drain-Source Resistance
38 mOhms
Configuration
Single
系列
Packaging
Cut Tape
系列
Packaging
MouseReel
系列
Packaging
Reel
高度
Height
0.7 mm
长度
Length
2 mm
产品
Product
MOSFET Small Signal
Transistor Type
1 P-Channel
宽度
Width
1.7 mm
工厂包装数量
Factory Pack Quantity
3000
单位重量
Unit Weight
0.000233 oz
文档预览
SSM3J120TU
TOSHIBA Field Effect Transistor Silicon P Channel MOS Type
SSM3J120TU
Power Management Switch Applications
High-Current Switching Applications
1.5 V drive
Low on-resistance
R
on
= 140 mΩ (max) (@V
GS
= -1.5 V)
R
on
= 78 mΩ (max) (@V
GS
= -1.8 V)
R
on
= 49 mΩ (max) (@V
GS
= -2.5 V)
R
on
= 38 mΩ (max) (@V
GS
= -4.0 V)
2.1±0.1
1.7±0.1
0.65±0.05
+0.1
0.3 -0.05
3
0.166±0.05
Unit: mm
Absolute Maximum Ratings
(Ta
=
25°C)
Characteristics
Drain-Source voltage
Gate-Source voltage
Drain current
DC
Pulse
Symbol
V
DS
V
GSS
I
D
I
DP
P
D
(Note 1)
P
D
(Note 2)
T
ch
T
stg
Rating
-20
±
8
-4.0
-8.0
800
500
150
−55~150
Unit
V
V
A
2.0±0.1
1
2
Drain power dissipation
Channel temperature
Storage temperature
mW
°C
°C
0.7±0.05
UFM
1. Gate
2. Source
3. Drain
Using continuously under heavy loads (e.g. the application of
JEDEC
high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
JEITA
reliability significantly even if the operating conditions (i.e.
TOSHIBA
2-2U1A
operating temperature/current/voltage, etc.) are within the
absolute maximum ratings.
Weight: 6.6mg (typ.)
Please design the appropriate reliability upon reviewing the
Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and
individual reliability data (i.e. reliability test report and estimated failure rate, etc).
Note 1 : Mounted on ceramic board
2
(25.4 mm
×
25.4 mm
×
0.8 t, Cu Pad: 645 mm )
Note 2 : Mounted on FR4 board
2
(25.4 mm
×
25.4 mm
×
1.6 t, Cu Pad: 645 mm )
Note:
Marking
3
Equivalent Circuit (top view)
3
JJB
1
2
1
2
Start of commercial production
2005-11
1
2014-03-01
SSM3J120TU
Electrical Characteristics
(Ta
=
25°C)
Characteristics
Drain-Source breakdown voltage
Drain cut-off current
Gate leakage current
Gate threshold voltage
Forward transfer admittance
Symbol
Test Condition
Min
−20
−12
−0.3
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
6.1
V
DS
= −16
V, I
DS
= −4.0
A,
V
GS
= −4.0
V,
I
D
=
4.0 A, V
GS
=
0
(Note 3)
Typ.
12.1
28
34
47
60
1484
185
169
67
92
22.3
14.9
7.3
0.8
Max
−10
±1
−1.0
38
49
78
140
1.2
V
nC
pF
pF
pF
ns
Unit
V
μA
μA
V
S
V
(BR) DSS
I
D
= −1
mA, V
GS
=
0
V
(BR) DSX
I
D
= −1
mA, V
GS
=
+8 V
I
DSS
I
GSS
V
th
⏐Y
fs
V
DS
=
−20
V, V
GS
= 0
V
GS
= ±8
V, V
DS
=
0
V
DS
= −3
V, I
D
= −1
mA
V
DS
=
-3 V, I
D
=
-2.0 A
I
D
=
-3.0 A, V
GS
=
-4.0 V
Drain-Source ON-resistance
R
DS (ON)
I
D
=
-2.0 A, V
GS
=
-2.5 V
I
D
=
-1.0 A, V
GS
=
-1.8 V
I
D
=
-0.3 A, V
GS
=
-1.5 V
Input capacitance
Output capacitance
Reverse transfer capacitance
Switching time
Total gate charge
Gate-Source charge
Gate-Drain charge
Drain-Source forward voltage
Turn-on time
Turn-off time
C
iss
C
oss
C
rss
t
on
t
off
Q
g
Q
gs
Q
gd
V
DSF
V
DS
= −10
V, V
GS
=
0
f
=
1 MHz
V
DD
= −10
V, I
D
= −2.0
A
V
GS
=
0 to
−2.5
V, R
G
=
4.7
Ω
Note 3: Pulse test
Switching Time Test Circuit
(a) Test Circuit
OUT
IN
−2.5
V
R
G
R
L
V
DD
90%
(b) V
IN
0V
10%
0
2.5V
10
μs
(c) V
OUT
V
DS (ON)
90%
10%
t
r
t
on
t
off
t
f
V
DD
=
-10 V
R
G
=
4.7
Ω
Duty
1%
V
IN
: t
r
, t
f
<
5 ns
Common Source
Ta
=
25 °C
V
DD
Precaution
V
th
can be expressed as the voltage between the gate and source when the low operating current value is I
D
= -1mA
for this product. For normal switching operation, V
GS (on)
requires a higher voltage than V
th
and V
GS (off)
requires a
lower voltage than V
th
. (The relationship can be established as follows: V
GS (off)
<
V
th
<
V
GS (on).
)
Be sure to take this into consideration when using the device.
Handling Precaution
When handling individual devices (which are not yet mounted on a circuit board), ensure that the environment is
protected against static electricity. Operators should wear anti-static clothing, and containers and other objects that come
into direct contact with devices should be made of anti-static materials.
2
2014-03-01
SSM3J120TU
-8
-2.5 V
-1.8 V
I
D
– V
DS
-10000
-1.5 V
-1000
Common Source
VDS
=
-3 V
I
D
– V
GS
(A)
-6
(mA)
I
D
Drain current
Drain current
I
D
-100
-4
VGS = -1.2 V
-2
-10
Ta
=
85 °C
−25
°C
-1
25 °C
-0.1
0
Common Source
Ta
=
25 °C
0
-0.5
-1
-1.5
-2
-0.01
0
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
-1.4
-1.6
Drain - Source voltage
V
DS
(V)
Gate - Source voltage
V
GS
(V)
R
DS (ON)
– V
GS
90
80
ID
=
-0.3 A
90
80
Common Source
R
DS (ON)
– V
GS
ID
=
-2.0 A
Common Source
Drain – Source on-resistance
R
DS (ON)
(mΩ)
70
60
50
40
30
20
−25
°C
10
0
0
-2
-4
-6
-8
25 °C
Ta
=
85 °C
Drain – Source on-resistance
R
DS (ON)
(mΩ)
70
60
50
25 °C
40
Ta
=
85 °C
30
20
−25
°C
10
0
0
-2
-4
-6
-8
Gate - Source voltage
V
GS
(V)
Gate - Source voltage
V
GS
(V)
R
DS (ON)
– I
D
90
Common Source
80
Ta
=
25 °C
100
Common Source
R
DS (ON)
– Ta
Drain – Source on-resistance
R
DS (ON)
(mΩ)
Drain – Source on-resistance
R
DS (ON)
(mΩ)
70
60
50
40
30
20
10
0
-1.8 V
-2.5 V
-4.0 V
VGS = -1.5 V
80
-1.0 A / -1.8 V
60
ID
=
-0.3 A / VGS
=
-1.5 V
40
20
-2.0 A / -2.5 V
-3.0 A / -4.0 V
0
-2
-4
-6
-8
0
−50
0
50
100
150
Drain current
I
D
(A)
Ambient temperature
Ta
(°C)
3
2014-03-01
SSM3J120TU
V
th
– Ta
Common Source
|Y
fs
| – I
D
(S)
30
Common Source
10
3
1
0.3
0.1
VDS
=
-3 V
Ta
=
25 °C
VDS
=
-3 V
ID
=
-1 mA
-0.8
V
th
(V)
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
0
−25
0
25
50
75
Forward transfer admittance
Gate threshold voltage
⎪Y
fs
-0.7
0.03
0.01
1
100
125
150
-10
-100
-1000
-10000
Ambient temperature
Ta
(°C)
Drain current
I
D
(mA)
5000
3000
C – V
DS
-10
Dynamic Input Characteristic
(pF)
Ciss
1000
500
300
(V)
V
GS
Gate-Source voltage
-8
C
-6
VDD
=
-16 V
-4
Capacitance
Coss
Crss
Common
Source
Ta
=
25 °C
f
=
1 MHz
VGS
=
0 V
-1
-10
-100
100
50
30
-2
10
-0.1
Common Source
ID
=
-4.0 A
Ta
=
25 °C
0
10
20
30
40
50
60
70
0
Drain – Source voltage
V
DS
(V)
Total gate charge
Q
g
(nC)
t – I
D
1000
toff
Common Source
VDD
=
-10 V
VGS
=
0
-2.5 V
Ta
=
25 °C
RG
=
4.7
Ω
-4
Common Source
VGS
=
0 V
Ta
=
25 °C
-3
I
DR
– V
DS
(A)
(ns)
D
I
DR
S
100
t
I
DR
tf
ton
Drain reverse current
Switching time
G
-2
10
tr
-1
1
0.01
0
0.1
1
10
0
0.2
0.4
0.6
0.8
1.0
Drain current
I
D
(A)
Drain-Source voltage
V
DS
(V)
4
2014-03-01
SSM3J120TU
1000
PD - Ta
a: mounted on FR4 board
(25.4mm×25.4mm×1.6mm)
Cu Pad :25.4mm×25.4mm
b:mounted on ceramic board
(25.4mm×25.4mm×0.8mm)
Cu Pad :25.4mm×25.4mm
b
800
Drain power dissipation PD(mW)
600
a
400
200
0
0
20
40
60
80
100
120
140
160
A mbient temperature Ta(°C)
Rth - tw
1000
c
Transient thermal impedance Rth(°C/W)
b
100
a
Single pulse
a:Mounted on ceramic board
(25.4mm×25.4mm×0.8mm)
Cu Pad :25.4mm×25.4mm
b:Mounted on FR4 board
(25.4mm×25.4mm×1.6mm)
Cu Pad :25.4mm×25.4mm
c:Mounted on FR4 Board
(25.4mm×25.4mm×1.6mm)
Cu Pad :0.45mm×0.8mm×3
10
1
0.001
0.01
0.1
1
10
Pulse width tw
 
(S)
100
1000
5
2014-03-01
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