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ST1317BAB-FREQ1

HCMOS Output Clock Oscillator, 32MHz Min, 80MHz Max,

器件类别:无源元件    振荡器   

厂商名称:Saronix

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器件参数
参数名称
属性值
厂商名称
Saronix
Reach Compliance Code
unknown
最大控制电压
3 V
最小控制电压
0.3 V
最长下降时间
4 ns
频率调整-机械
NO
频率偏移/牵引率
50 ppm
频率稳定性
50%
线性度
10%
制造商序列号
ST1317
安装特点
SURFACE MOUNT
最大工作频率
80 MHz
最小工作频率
32 MHz
最高工作温度
70 °C
最低工作温度
振荡器类型
HCMOS
输出负载
30 pF
物理尺寸
7.2mm x 5.2mm x 1.8mm
最长上升时间
4 ns
标称供电电压
3.3 V
表面贴装
YES
最大对称度
45/55 %
文档预览
SaRonix
Voltage Controlled Crystal Oscillator
Technical Data
Frequency Range:
Frequency Stability:
32 MHz to 125 MHz
±50 ppm over all conditions: operating temperature, voltage change,
load change, calibration tolerance, shock and vibration
5 years @ +40°C: ±10ppm max, 10 years @ +40°C: ±12ppm max
0 to +70°C or -40 to +85°C
-55 to +125°C
3.3 & 5V, HCMOS, SMD
ST1317 / 1517 Series
Aging:
Temperature Range:
Operating:
Storage:
Supply Voltage:
Recommended Operating:
Supply Current:
ACTUAL SIZE
3.3V ±10% or 5V ±5%
3.3V: 35mA max
5V: 50mA max 32 to 70MHz, 65mA max 70+ to 125MHz
Output Drive:
Description
The ST1317 / 1517 Series are voltage
controlled crystal oscillators, with output
logic levels compatible with HCMOS
and TTL logic families. The device is
contained in a sub-miniature, very low
profile, leadless ceramic SMD pack-
age with 6 gold-plated contact pads.
This miniature VCXO is ideal for to-
day's automated assembly environments.
Applications
• For use in Phase-Locked Loop (PLL)
Clock and Data Recovery, Frequency
Translation, or Frequency Synthesis
applications in Video, Video Compres-
sion, Telephony, and LAN/WAN Data
Communication environments.
• High and wide frequency range from
32 to 125 MHz, see ST1307 / 1507 for
frequencies from 1 to 31.999 MHz
ˆ 3.3 or 5 Volt operations
• HCMOS and TTL compatible
• Tri-state output
• Sub-miniature, Ceramic SMD package
• Available on tape & reel; 16mm tape,
500pcs per reel
Output Waveform
T
r
1 LEVEL
80% V
DD
50% V
DD
20% V
DD
0 LEVEL
HCMOS
T
f
Symmetry:
Rise & Fall Times:
Logic 0:
Logic 1:
Load:
Period Jitter RMS:
Phase Noise:
5V: 45/55% @ 50% V
DD,
40/60% @ 1.4V level
3.3V: 45/55% @50% V
DD
0 to +70°C, 40/60% -40 to +85°C
4ns max, 20 to 80% V
DD
(CMOS), 1.5ns max, 0.5V to 2.5V (TTL)
20% V
DD
or 0.5V max
80% V
DD
or 2.5V min
5V: 50pF or 5TTL 32 to 50MHz, 30pF or 5TTL 50+ to 125MHz
3.3V: 30pF 32 to 80MHz, 95Ω AC 80+ to 125MHz
20ps max
-95dBc / Hz @ 100 Hz
-110dBc / Hz @ 1 kHz
-100dBc / Hz @ 10 kHz
Pull Characteristics:
Input Impedance:
Frequency Response (-3dB):
Pullability:
Control Voltage:
Transfer Function:
Monotonic Linearity:
Center Control Voltage:
Mechanical:
Shock:
Solderability:
Terminal Strength:
Vibration:
Solvent Resistance:
Resistance to Soldering Heat:
Environmental:
Thermal Shock:
Moisture Resistance:
50KΩ min
50 kHz min
±32, ±50, ±100ppm APR*
0.5 to 4.5V or 0.3 to 3.0V
Frequency increases when Control Voltage increases
10% max
2.5V or 1.65V
MIL-STD-883,
MIL-STD-883,
MIL-STD-883,
MIL-STD-883,
MIL-STD-202,
MIL-STD-202,
Method 2002, Condition B
Method 2003
Method 2004, Condition D
Method 2007, Condition A
Method 215
Method 210, Condition I or J
MIL-STD-883, Method 1011, Condition A
MIL-STD-883, Method 1004
Solder Reflow Guide
Temperature – °C
250
200
150
Reflow 240°C max
4°C/sec max
Preheat 183 ±10°C
Cooling
4°C/sec max
Time
1 – 2 minutes
10 sec max
SYMMETRY
* APR = (VCXO Pull relative to specified Output Freq. @
nominal control voltage) – (VCXO Freq. Stability)
DS-170
REV A
SaRonix
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
SaRonix
Voltage Controlled Crystal Oscillator
Technical Data
Tri-State Logic Table
Pin 2 Input
Logic 1 or N/C
Logic 0
Pin 4 Output
Oscillation
High Impedance
Model
SaRonix Tri-State
Series
1517 = 5V, Ceramic, HCMOS / TTL VCXO
1317 = 3.3V, Ceramic, HCMOS VCXO
Stability Tolerance
B = ±50 ppm 0 to +70°C
E = ±50 ppm -40 to +85°C
5.2
max
.205
3.3 & 5V HCMOS, SMD
ST1317 / 1517 Series
Part Numbering Guide
ST 1317 B B B - 110.0000 (T)
(T) = Tape & Reel
full reel increments only
Frequency (MHz)
Linearity
B = 10%
Pullability (minimum APR)*
B = ±100 ppm
A = ±50 ppm
F = ±32 ppm
Required Input Levels on Pin 2:
Logic 1 = 3.0V min
Logic 0 = 0.5V max(5V), 0.3V max (3.3V)
Package Details
7.2
max
.284
* APR = (VCXO Pull relative to specified Output Freq. @ nominal control voltage) – (VCXO Freq. Stability)
Test Circuits:
1.8
max
.071
Pin 1
1.6
.063
1.4
.055
Pin 3
mA
M
TEST POINT
Pin 6
Pin 5
Pin 4
Pin 2
Pin 5
OSCILLATOR
2.8
.110
1.2
.047
Pin 6
2.54
.100
5.08
.200
Pin 4: Output
Pin 5: N/C
Pin 6: Supply Voltage
Pin 4
POWER
SUPPLY
0.1µF
Pin 1
Pin 2
Pin 3
C
L
= 50pF: 32 to 50 MHz
30pF: 50+ to 125 MHz
(Note A)
VC
Pin Functions:
Pin 1: Control Voltage
Pin 2: Tri-State Control
Pin 3: GND
Marking Format*
Stability/Temp, Pullability (APR)
A: 50ppm 0 to 70°C, 100ppm
B: 50ppm 0 to 70°C, 50ppm
C: 50ppm 0 to 70°C, 32ppm
D: 50ppm -40 to 85°C, 100ppm
E: 50ppm -40 to 85°C, 50ppm
F: 50ppm -40 to 85°C, 32ppm
3: 3.3V(1317)
4: 5V(1517)
SaRonix
Frequency
TRI-STATE INPUT or ENABLE/DISABLE
5V HCMOS Load
(current limited on fixture)
NOTE A: C
L
includes probe and jig capacitance.
SIMULATED TEST LOAD
V
CC
TEST POINT
780Ω
Pin 4
S 3 A
YYWW
Date Code
mA
M
Pin 6
Pin 5
*
Exact location of items may vary
OSCILLATOR
Recommended Land Pattern
**
2.0
.079
2.54
.100
1.8
.071
POWER
SUPPLY
0.1µF
Pin 1
Pin 2
Pin 3
C
L
= 15pF
(Note A)
6
4
4.4
.173
VC
2.4
.094
3
1
5.08
.200
TRI-STATE INPUT or ENABLE/DISABLE
(current limited on fixture)
5V TTL Load
NOTE A: C
L
includes probe and jig capacitance.
All specifications are subject to change without notice.
**
External high frequency power supply
decoupling required.
Scale: None (Dimensions in
mm
)
inches
DS-170
REV A
SaRonix
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
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