ST2L05R2528PT,ST2L05R2528PT pdf中文资料,ST2L05R2528PT引脚图,ST2L05R2528PT电路-Datasheet-电子工程世界

文档预览

ST2L05

VERY LOW QUIESCENT CURRENT

DUAL VOLTAGE REGULATOR

= 1.5, 1.8, 2.5, 2.8, 3.0, 3.3V FIXED

= 1.5, 1.8, 2.5, 2.8, 3.0, 3.3V FIXED OR

ADJUSTABLE FROM 1.25 TO V

- V

DROP

GUARANTEED OUTPUT1 CURRENT: 1A

GUARANTEED OUTPUT2 CURRENT: 1A

± 2% OUTPUT TOLERANCE (AT 25°C)

± 3% OUTPUT TOLERANCE OVER TEMP.

TYPICAL DROPOUT 1.1V (I

= I

= 1A)

INTERNAL POWER AND THERMAL LIMIT

STABLE WITH LOW ESR OUTPUT

CAPACITOR

OPERATING TEMPERATURE RANGE:

0°C TO 125°C

VERY LOW QUIESCENT CURRENT: 7mA

MAX OVER TEMP.

AVAILABLE IN PPAK, SPAK AND IN DFN

5x6mm PACKAGE

SPAK-5L

PPAK

DFN

DESCRIPTION

Specifically

designed

for

data

storage

applications, this device integrates two voltage

regulators, each one able to supply 1A and it is

assembled in PPAK, in SPAK and in a new 8-PIN

surface mounting package named DFN 5x6mm at

8 pins. The first regulator block supplies 1.5V,

1.8V, 2.5V, 2.8V, 3.0V, 3.3V depending on the

BLOCK DIAGRAM OF FIXED/ADJ VERSION

chosen version. The second one may be fixed to

the same values or adjustable from 1.25V to V

DROP

that could power several kind of different

micro-controllers. Both outputs are current limited

and over temperature protected. It is worth

underlining the very good thermal performance of

the packages SPAK and DFN with only 2°C/W of

Thermal

Resistance

Junction

Case.

Applications are HARD DISK, CD/DVD-ROM, CD/

DVD-R/RW, COMBO (DVD-ROM+CD-R/RW).

October 2003

1/24

ST2L05

BLOCK DIAGRAM OF FIXED/FIXED VERSION

2/24

ST2L05

ORDERING CODES

1.5 V

1.8 V

2.5 V

2.8 V

3.0 V

3.3 V

1.5 V

1.8 V

2.5 V

2.8 V

3.0 V

3.3 V

ADJ

1.5 V

1.8 V

2.5 V

2.8 V

3.0 V

3.3 V

ADJ

1.5 V

1.8 V

2.5 V

2.8 V

3.0 V

3.3 V

ADJ

1.5 V

1.8 V

2.5 V

2.8 V

3.0 V

3.3 V

ADJ

1.5 V

1.8 V

2.5 V

2.8 V

3.0 V

3.3 V

ADJ

1.5 V

1.8 V

2.5 V

2.8 V

3.0 V

3.3 V

ADJ

SPAK

ST2L05R1515K5 (*)

ST2L05R1518K5 (*)

ST2L05R1525K5 (*)

ST2L05R1528K5 (*)

ST2L05R1530K5 (*)

ST2L05R1533K5 (*)

ST2L05R1500K5 (*)

ST2L05R1815K5 (*)

ST2L05R1818K5 (*)

ST2L05R1825K5 (*)

ST2L05R1828K5 (*)

ST2L05R1830K5 (*)

ST2L05R1833K5 (*)

ST2L05R1800K5 (*)

ST2L05R2515K5 (*)

ST2L05R2518K5 (*)

ST2L05R2525K5 (*)

ST2L05R2528K5 (*)

ST2L05R2530K5 (*)

ST2L05R2533K5 (*)

ST2L05R2500K5 (*)

ST2L05R2815K5 (*)

ST2L05R2818K5 (*)

ST2L05R2825K5 (*)

ST2L05R2828K5 (*)

ST2L05R2830K5 (*)

ST2L05R2833K5 (*)

ST2L05R2800K5 (*)

ST2L05R3015K5 (*)

ST2L05R3018K5 (*)

ST2L05R3025K5 (*)

ST2L05R3028K5 (*)

ST2L05R3030K5 (*)

ST2L05R3033K5 (*)

ST2L05R3000K5 (*)

ST2L05R3315K5 (*)

ST2L05R3318K5 (*)

ST2L05R3325K5 (*)

ST2L05R3328K5 (*)

ST2L05R3330K5 (*)

ST2L05R3333K5 (*)

ST2L05R3300K5

PPAK

ST2L05R1515PT (*)

ST2L05R1518PT (*)

ST2L05R1525PT (*)

ST2L05R1528PT (*)

ST2L05R1530PT (*)

ST2L05R1533PT (*)

ST2L05R1500PT

ST2L05R1815PT (*)

ST2L05R1818PT (*)

ST2L05R1825PT

ST2L05R1828PT (*)

ST2L05R1830PT (*)

ST2L05R1833PT (*)

ST2L05R1800PT

ST2L05R2515PT (*)

ST2L05R2518PT (*)

ST2L05R2525PT (*)

ST2L05R2528PT (*)

ST2L05R2530PT (*)

ST2L05R2533PT (*)

ST2L05R2500PT

ST2L05R2815PT (*)

ST2L05R2818PT (*)

ST2L05R2825PT (*)

ST2L05R2828PT (*)

ST2L05R2830PT (*)

ST2L05R2833PT (*)

ST2L05R2800PT (*)

ST2L05R3015PT (*)

ST2L05R3018PT (*)

ST2L05R3025PT (*)

ST2L05R3028PT (*)

ST2L05R3030PT (*)

ST2L05R3033PT (*)

ST2L05R3000PT (*)

ST2L05R3315PT (*)

ST2L05R3318PT

ST2L05R3325PT

ST2L05R3328PT (*)

ST2L05R3330PT (*)

ST2L05R3333PT (*)

ST2L05R3300PT

DFN

ST2L05R1515PS (*)

ST2L05R1518PS (*)

ST2L05R1525PS (*)

ST2L05R1528PS (*)

ST2L05R1530PS (*)

ST2L05R1533PS (*)

ST2L05R1500PS (*)

ST2L05R1815PS (*)

ST2L05R1818PS (*)

ST2L05R1825PS (*)

ST2L05R1828PS (*)

ST2L05R1830PS (*)

ST2L05R1833PS (*)

ST2L05R1800PS (*)

ST2L05R2515PS (*)

ST2L05R2518PS (*)

ST2L05R2525PS (*)

ST2L05R2528PS (*)

ST2L05R2530PS (*)

ST2L05R2533PS (*)

ST2L05R2500PS (*)

ST2L05R2815PS (*)

ST2L05R2818PS (*)

ST2L05R2825PS (*)

ST2L05R2828PS (*)

ST2L05R2830PS (*)

ST2L05R2833PS (*)

ST2L05R2800PS (*)

ST2L05R3015PS (*)

ST2L05R3018PS (*)

ST2L05R3025PS (*)

ST2L05R3028PS (*)

ST2L05R3030PS (*)

ST2L05R3033PS (*)

ST2L05R3000PS (*)

ST2L05R3315PS (*)

ST2L05R3318PS (*)

ST2L05R3325PS

ST2L05R3328PS (*)

ST2L05R3330PS (*)

ST2L05R3333PS (*)

ST2L05R3300PS

SHIPMENT

(1)

Tape & Reel

(*) Available on request.

(1) For Tube Shipment, change "R" with "-" in the relevant ordering code, DFN is available only in Tape & Reel.

3/24

ST2L05

ABSOLUTE MAXIMUM RATINGS

Symbol

OSH

stg

LEAD

Operating Input Voltage

Power Dissipation

Short Circuit Output Current - 3.3 V and adjustable output

Operating Junction Temperature Range

Storage Temperature Range

(*)

Lead Temperature (Soldering) 10 Sec.

Parameter

Value

Internally Limited

0 to 150

-65 to 150

260

°C

Unit

(*) Storage temperatures > 125°C are only acceptable if the Dual Regulator is soldered to a PCBA.

Absolute Maximum Ratings are those beyond which damage to the device may occur. Functional operation under these condition is not im-

plied.

RECOMMENDED OPERATING CONDITIONS

Symbol

∆V

RISE

FALL

Input Voltage

Input Voltage Ripple

Input Voltage Rise Time (from 10% to 90%)

Input Voltage Fall Time (from 10% to 90%)

Parameter

Value

4.5 to 7

± 0.15

≥

Unit

µsec

THERMAL DATA

Symbol

thj-case

thj-amb

Parameter

Thermal Resistance Junction-case

Thermal Resistance Junction-ambient

SPAK

DFN

PPAK

100

Unit

°C/W

CONNECTION DIAGRAM

(top view for PPAK and SPAK, top through view for DFN8)

PPAK

SPAK

DFN8

PIN DESCRIPTION

PPAK/SPAK

DFN

1, 2, 6

Symbol

ADJ/N.C.

GND

Name and Function

Bypass with a 4.7µF capacitor to GND

Resistor divider connection/Not Connected

Ground

Adjustable output voltage: bypass with a 4.7µF capacitor to GND

Fixed output voltage: bypass with a 4.7µF capacitor to GND

Not Connected

4/24

ST2L05

APPLICATION CIRCUIT OF FIXED/FIXED VERSION

APPLICATION CIRCUIT OF FIXED/ADJ VERSION

NOTE: The regulator is designed to be stable with either tantalum or ceramic capacitors on the input and outputs. The expected values of

the input and output X7R ceramic capacitors are from 4.7µF to 22µF with 4.7µF typical. The input capacitor must be connected within 0.5

inches of the V

terminal. The output capacitors must also be connected within 0.5 inches of output pins V

and V

. There is no upper limit

to the size of the input capacitor (for more details see the Application Hints section).

NOTE: In the Fixed/ADJ version, the adjustable output voltage V

is designed to support output voltages from 1.25V to V

- V

DROP

. The

adjustable output voltage V

is set by a resistor divider connected between V

(pin4) and Ground (pin3) with its centre tap connected to

ADJ (pin2). The voltage divider resistors are: R

connected to V

and V

ADJ and R

connected to V

ADJ and GND. V

is deter-

mined by V

REF

, R

, and I

ADJ

as follows (for more details see the Application Hints section):

= V

REF

(1+R

) + I

ADJ

5/24