STK17T88
nvTime
Event Data Recorder
TM
32K x 8
AutoStore
nvSRAM
With Real-Time Clock
•
Data Integrity of Simtek nvSRAM Combined
with Full-Featured Real-Time Clock
o
Low Power, 300 nA Max, RTC current
o
Capacitor or battery backup for RTC
•
Watchdog Timer
•
Clock Alarm with programmable Interrupts
•
25ns, 35ns and 45ns Access Times
•
“Hands-off” Automatic
STORE
on Power Down
with only a small capacitor
•
STORE
to
QuantumTrap™
Initiated by
Software , device pin, or on Power Down
•
RECALL
to SRAM Initiated by Software or
Power Up
•
Unlimited
READ, WRITE
and
RECALL
Cycles
•
High-reliability
o
Endurance to 1 Million Cycles
o
Retention to 100 years at 125 ºC
•
5mA Typical I
CC
at 200ns Cycle Time
•
Single 3V +20%, -10% Operation
•
SSOP and DIP Packages, (ROHS compliant)
TM
FEATURES
DESCRIPTION
The Simtek STK17T88 combines a 256 Kbit
nonvolatile static RAM with a full-featured real-time
clock in a reliable, monolithic integrated circuit. The
embedded
nonvolatile
elements
incorporate
Simtek’s
QuantumTrap™
technology producing the
world’s most reliable nonvolatile memory. The
SRAM can be read and written an unlimited number
of times, while independent, nonvolatile data resides
in the nonvolatile elements.
The Real-Time Clock function provides an accurate
clock with leap year tracking and a programmable,
high accuracy oscillator. The Alarm function is pro-
grammable for one-time alarms or periodic seconds,
minutes, hours, or days. There is also a programma-
ble Watchdog Timer for process control.
BLOCK DIAGRAM
Quantum Trap
512 X 512
A
5
A
6
A
7
A
8
A
9
A
11
A
12
A
13
A
14
DQ
0
DQ
1
DQ
2
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
ROW DECODER
STORE
STATIC RAM
ARRAY
512 X 512
RECALL
V
CC
V
CAP
V
RTCbat
V
RTCcap
POWER
CONTROL
STORE/
RECALL
CONTROL
HSB
SOFTWARE
DETECT
INPUT BUFFERS
COLUMN I/O
COLUMN DEC
RTC
A
13
– A
0
X
1
X
2
INT
A
14
– A
0
G
E
W
A
0
A
1
A
2
A
3
A
4
A
10
MUX
Figure 1. Block Diagram
April 2005
1
Document Control #ML0024 rev 1.2
STK17T88
PACKAGES
V
CAP
A
14
A
12
A
7
A
6
A
5
INT
A
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
V
CC
V
CAP
HSB
W
A
13
A
8
A
9
A
11
A
14
A
12
A
7
A
6
A
5
INT
A
4
V
SS
V
RTCbat
DQ
0
A
3
A
2
A
1
A
0
DQ
1
DQ
2
X
1
X
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
V
CC
HSB
W
A
13
A
8
A
9
A
11
V
SS
G
A
10
E
DQ
7
DQ
6
V
RTCcap
DQ
5
DQ
4
DQ
3
V
CC
48 Pin SSOP
V
SS
V
RTCbat
DQ
0
A
3
A
2
A
1
A
0
DQ
1
DQ
2
X
1
X
2
V
SS
V
RTCcap
DQ
6
G
A
10
E
DQ
7
DQ
5
DQ
4
DQ
3
V
CC
40 Pin PDIP
48 Pin SSOP
Relative PCB area usage.
See website for detailed
package size specifications.
PIN DESCRIPTIONS
Pin Name
A
14
– A
0
DQ
7
–DQ
0
E
Input
I/O
Input
I/O
Description
Address: The 15 address inputs select one of 32,752 bytes in the nvSRAM array or one of 16 bytes in the clock
register map.
Data: Bi-directional 8-bit data bus for accessing the nvSRAM array and RTC.
Chip Enable: The active low E
input selects the device.
W
Input
Write Enable: The active low W enables data on the DQ pins to be written to the address location latched by the
falling edge of E .
G
X
1
X
2
V
RTCcap
V
RTCbat
V
CC
HSB
INT
V
CAP
V
SS
(Blank)
Input
Output
Input
Power Supply
Power Supply
Power Supply
I/O
Output
Power Supply
Power Supply
No Connect
Output Enable: The active low G input enables the data output buffers during read cycles. De-asserting G high
causes the DQ pins to tri-state.
Crystal Connection, drives crystal on startup.
Crystal Connection for 32.768 kHz crystal.
Capacitor supplied backup RTC supply voltage. (Left unconnected if V
RTCbat
is used.)
Battery supplied backup RTC supply voltage. (Left unconnected if V
RTCcap
is used.)
Power 3.0V +20%, -10%
Hardware Store Busy: When low this output indicates a Hardware Store is in progress. When pulled low external
to the chip it will initiate a nonvolatile STORE operation. A weak internal pull up resistor keeps this pin high if not
connected. (Connection Optional)
Interrupt Output: Can be programmed to respond to the clock alarm, the watchdog timer and the power monitor.
Programmable to either active high (push/pull) or active low (open-drain).
Autostore
Capacitor: Supplies power to nvSRAM during power loss to store data from SRAM to nonvolatile
elements.
Ground
Unlabeled pins have no internal connection.
April 2005
2
Document Control #ML0024 rev 1.2
STK17T88
ABSOLUTE MAXIMUM RATINGS
a
-0.5V to +4.1V
Power Supply Voltage
-0.5V to (V
CC
+ 0.5V)
Voltage on Input Relative to V
SS
-0.5V to (V
CC
+ 0.5V)
Voltage on Outputs
Temperature under Bias
–55°C to 125°C
Junction Temperature
–55°C to 140°C
Storage Temperature
–65°C to 150°C
Power Dissipation
1W
DC Output Current (1 output at a time, 1s duration)
15mA
Notes
a: Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at con-
ditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rat-
ing conditions for extended periods may affect reliability.
Package Thermal Characteristics see website:
http://www.simtek.com/
DC CHARACTERISTICS
Symbol
I
CC1
Parameter
Average V
CC
Current
Commercial
MIN
MAX
65
55
50
Industrial
MIN
MAX
70
60
55
Units
mA
mA
mA
Notes
t
AVAV
= 25ns
t
AVAV
= 35ns
t
AVAV
= 45ns
Dependent on output loading and cycle
rate. Values obtained without output loads.
All Inputs Don’t Care, V
CC
= max
Average current for duration of
STORE
cycle (t
STORE
).
W
≥
(V
CC
– 0.2V)
All Others Inputs Cycling, at CMOS Levels.
Dependent on output loading and cycle
rate. Values obtained without output loads.
All Inputs Don’t Care
Average current for duration of
STORE
cycle (t
STORE
).
E
≥
(V
CC
– 0.2V)
All Others V
IN
≤
0.2V or
≥
(V
CC
– 0.2V)
Standby current level after nonvolatile
cycle is complete.
V
CC
= max
I
CC2
Average V
CC
Current during STORE
Average V
CC
Current at t
AVAV
= 200ns
3
3
mA
I
CC3
3V, 25°C, Typical
Average V
CAP
Current during
AutoStore™
Cycle
V
CC
Standby Current
5
3
5
3
mA
mA
I
CC4
I
SB
(Standby, Stable CMOS Input Levels)
2
2
mA
I
ILK
I
OLK
V
IH
V
IL
V
OH
V
OL
T
A
V
CC
V
CAP
Input Leakage Current
±1
Off-State Output Leakage Current
±1
Input Logic “1” Voltage
Input Logic “0” Voltage
Output Logic “1” Voltage
Output Logic “0” Voltage
Operating Temperature
Operating Voltage
Storage Capacitor
0
2.7
17
2.0
V
SS
– 0.5
2.4
0.4
70
3.6
57
–40
2.7
17
V
CC
+ 0.3
0.8
2.0
V
SS
– 0.5
2.4
0.4
85
3.6
57
±1
V
CC
+ 0.3
0.8
µA
V
V
V
V
o
±1
µA
V
IN
= V
SS
to V
CC
V
CC
= max
V
IN
= V
SS
to V
CC
, E or G
≥
V
IH
All Inputs
All Inputs
I
OUT
= –2mA
I
OUT
= 4mA
C
3.0V +20%, -10%
Between Vcap pin and Vss, 6.3V rated.
V
µF
April 2005
3
Document Control #ML0024 rev 1.2
STK17T88
AC TEST CONDITIONS
0V to 3V
Input Pulse Levels
Input Rise and Fall Times
≤
5ns
Input and Output Timing Reference Levels
1.5V
Output Load
See Figure 2 and Figure 3
CAPACITANCE
SYMBOL
C
IN
C
OUT
Notes
b
(T
A
= 25°C, f = 1.0MHz)
MAX
7
7
UNITS
pF
pF
CONDITIONS
∆V
= 0 to 3V
∆V
= 0 to 3V
PARAMETER
Input Capacitance
Output Capacitance
b: These parameters are guaranteed but not tested
3.0V
577 Ohms
OUTPUT
789 Ohms
OUTPUT
3.0V
577 Ohms
30 pF
INCLUDING
SCOPE AND
FIXTURE
789 Ohms
5 pF
30 pF
INCLUDING
SCOPE AND
FIXTURE
Figure 2. AC Output Loading
Figure 3. AC Output Loading,
for tristate specs (
t
HZ
, t
LZ
, t
WLQZ
, t
WHQZ
,
t
GLQX
, t
GHQZ
)
April 2005
4
Document Control #ML0024 rev 1.2
STK17T88
RTC DC CHARACTERISTICS
Symbol
I
BAK
V
RTCbat
V
RTCcap
t
OSCS
Parameter
RTC Backup Current
RTC Battery Pin Voltage
RTC Capacitor Pin Voltage
RTC Oscillator time to start
Commercial
MIN
MAX
300
3.3
2.7
1
10
Industrial
MIN
MAX
350
3.3
2.7
1
10
Units
nA
V
V
min
sec
Notes
From either V
RTCcap
or V
RTCbat
Typical = 3.0 Volts during normal
operation
Typical = 2.4 Volts during normal
operation
@ MIN Temperature from Power up
or Enable
@25ºC from Power up or Enable
-
1.8
1.2
-
1.8
1.2
-
-
-
-
RTC RECOMMENDED COMPONENT CONFIGURATION
C
1
RF
C
2
Y
1
X
1
X
2
Recommended Values
Y
1
= 32.768 KHz
RF = 10M Ohm
C
1
= 2.2 pF
C
2
= 47 pF
Figure 4. RTC COMPONENT CONFIGURATION
April 2005
5
Document Control #ML0024 rev 1.2
