ALSO OPERATES WITH 10-42V SUPPLY, SEATED HT-CALCULATED, SEATED HGT-NOM
模拟集成电路 - 其他类型
STEPPER MOTOR CONTROLLER
JESD-30 代码
R-PZIP-T19
JESD-609代码
e2
长度
29.2 mm
功能数量
1
端子数量
19
最大输出电流
10 A
封装主体材料
PLASTIC/EPOXY
封装代码
HSZIP
封装等效代码
ZIP19,.15,.16,40FL
封装形状
RECTANGULAR
封装形式
IN-LINE, HEAT SINK/SLUG, SHRINK PITCH
电源
5,24 V
认证状态
Not Qualified
座面最大高度
18.2 mm
最大供电电流 (Isup)
8 mA
最大供电电压 (Vsup)
5.25 V
最小供电电压 (Vsup)
4.75 V
标称供电电压 (Vsup)
5 V
表面贴装
NO
技术
HYBRID
端子面层
Tin/Nickel (Sn/Ni)
端子形式
THROUGH-HOLE
端子节距
1 mm
端子位置
ZIG-ZAG
宽度
4.5 mm
Base Number Matches
1
文档预览
Ordering number : ENA1129A
STK672-630A-E
Thick-Film Hybrid IC
2-phase Stepping Motor Driver
Overview
http://onsemi.com
The STK672-630A-E is a hybrid IC for use as a unipolar, 2-phase stepping motor driver with PWM current control.
Applications
•
Office photocopiers, printers, etc.
Features
•
Built-in overcurrent detection function (output current OFF).
•
Built-in overheat detection function (output current OFF).
•
If either over-current or overheat detection function is activated, the FAULT signal (active low) is output.
•
Built-in power on reset function.
•
The motor speed is controlled by the frequency of an external clock signal.
•
2 phase or 1-2 phase excitation switching function.
•
Using either or both edges of the clock signal switching function.
•
Phase is maintained even when the excitation mode is switched.
•
Rotational direction switching function.
•
Supports schmitt input for 2.5V high level input.
•
Incorporating a current detection resistor (0.141Ω: resistor tolerance
±2%),
motor current can be set using two
external resistors.
•
The ENABLE pin can be used to cut output current while maintaining the excitation mode.
•
With a wide current setting range, power consumption can be reduced during standby.
•
No motor sound is generated during hold mode due to external excitation current control.
Semiconductor Components Industries, LLC, 2013
June, 2013
62911HKPC 018-08-0034/71608HKIM No. A1129-1/21
STK672-630A-E
Specifications
Absolute Maximum Ratings
at Tc = 25°C
Parameter
Maximum supply voltage 1
Maximum supply voltage 2
Input voltage
Output current 1
Output current 2
Output current 3
Allowable power dissipation 1
Allowable power dissipation 2
Operating substrate temperature
Junction temperature
Storage temperature
Symbol
VCC max
VDD max
VIN max
IOP max
IOH max
IOF max
PdMF max
PdPK max
Tc max
Tj max
Tstg
No signal
No signal
Logic input pins
10μA, 1 pulse (resistance load)
VDD=5V, CLOCK≥200Hz
Pin16 output current
With an arbitrarily large heat sink. Per MOSFET
No heat sink
Conditions
Ratings
52
-0.3 to +6.0
-0.3 to +6.0
10
2.65
10
7.3
3.1
105
150
-40 to +125
unit
V
V
V
A
A
mA
W
W
°C
°C
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Allowable Operating Ranges
at Ta=25°C
Parameter
Operating supply voltage 1
Operating supply voltage 2
Input high voltage
Input low voltage
Output current 1
Output current 2
Symbol
VCC
VDD
VIH
VIL
IOH1
IOH2
With signals applied
With signals applied
Pins 10, 12, 13, 14, 15, 17
Pins 10, 12, 13, 14, 15, 17
Tc=105°C, CLOCK≥200Hz,
Continuous operation, duty=100%
Tc=80°C, CLOCK≥200Hz,
Continuous operation, duty=100%,
See the motor current (IOH) derating curve
CLOCK frequency
Phase driver withstand voltage
Recommended operating
substrate temperature
Recommended Vref range
Vref
Tc=105°C
fCL
VDSS
Tc
Minimum pulse width: at least 10μs
ID=1mA (Tc=25°C)
No condensation
0 to 50
100min
0 to 105
0.14 to 1.38
kHz
V
°C
V
2.2
A
Conditions
Ratings
10 to 42
5±5%
2.5 to VDD
0 to 0.8
2.0
unit
V
V
V
V
A
Refer to the graph for each conduction-period tolerance range for the output current and brake current.
Electrical Characteristics
at Tc=25°C, VCC=24V, VDD=5.0V
Parameter
VDD supply current
Output average current
FET diode forward voltage
Output saturation voltage
Input high voltage
Input low voltage
FAULT low output voltage
5V level FAULT leakage current
5V level input current
GND level input current
Vref input bias current
PWM frequency
Overheat detection temperature
Symbol
ICCO
Ioave
Vdf
Vsat
VIH
VIL
VOLF
IILF
IILH
IILL
IIB
fc
TSD
Design guarantee
Conditions
Pin 9 current CLOCK=GND
R/L=1Ω/0.62mH in each phase
If=1A (RL=23Ω)
RL=23Ω
Pins 10, 12, 13, 14, 15, 17
Pins 10, 12, 13, 14, 15, 17
Pin 16 (IO=5mA)
Pin 16=5V
Pins 10, 12, 13, 14, 15, 17=5V
Pins 10, 12, 13, 14, 15, 17=GND
Pin 19=1.0V
29
10
45
144
50
0.25
2.5
0.8
0.5
10
75
10
15
61
0.273
min
typ
4.4
0.329
0.92
0.33
max
8
0.385
1.6
0.48
unit
mA
A
V
V
V
V
V
μA
μA
μA
μA
kHz
°C
*Ioave values are for when the lead frame of the product is soldered to the mounting substrate.
Notes: A fixed-voltage power supply must be used.
No. A1129-2/21
STK672-630A-E
Package Dimensions
unit:mm (typ)
29.2
25.6
(20.47)
2.0
4.5
(12.9)
(5.0)
(5.0)
(R1.7)
11.0
14.5
14.4
7.2
1
19
(3.5)
1.0
(5.6)
18 1.0=18.0
0.52
4.2
0.4
8.2
(20.4)
Derating curve of motor current, IOH, vs. STK672-630A-E Operating substrate temperature, Tc
3.0
IOH - Tc
200Hz 2-phase excitation
2.5
Motor current, IOH - A
Hold mode
2.0
1.5
1.0
0.5
0
0
10
20
30
40
50
60
70
80
90
100
110
ITF02548
Operating Substrate Temperature, Tc-
°C
Notes
•
The current range given above represents conditions when output voltage is not in the avalanche state.
•
If the output voltage is in the avalanche state, see the allowable avalanche energy for STK672-6** series hybrid ICs given
in a separate document.
•
The operating substrate temperature, Tc, given above is measured while the motor is operating.
•
Because Tc varies depending on the ambient temperature, Ta, the value of IOH, and the continuous or intermittent
operation of IOH, always verify this value using an actual set.
14.5
No. A1129-3/21
STK672-630A-E
Block Diagram
N.C
8
VDD=5V
9
Excitation mode
selection
Phase
advance
counter
Latch
Circuit
VDD
FAO
Phase
excitation
signal
generator
FAB
FBO
FBB
7
N.C
4
F1
A
5
F2
AB
3
F3
B
1
F4
BB
MODE1 10
N.C 11
MODE2 17
CLOCK 12
CWB 13
RESETB 14
ENABLE 15
Power-on
reset
Overcurrent
detection
R1
R2
P.G2
AI
2
P.G1
6
Vref
VSS
VSS
Amplifier
100kΩ
VSS
FAULT
signal
(open drain)
Overheating
detection
Latch
Circuit
Current control
chopper circuit
Vref/4.9
FAULT 16
BI
S.G 18
Vref 19
Sample Application Circuit
STK672-630A-E
VDD(5V)
CLOCK
MODE1
MODE2
CWB
ENABLE
RESETB
14
R01
FAULT
Vref
19
R02
18
9
12
10
17
13
15
3
1
B
BB
+
C01
at least 100μF
16
2
6
S.G
P.G2
P.G1
4
5
A
AB
VCC
24V
2 phase stepping motor driver
R03
P.GND
No. A1129-4/21
STK672-630A-E
Precautions
[GND wiring]
•
To reduce noise on the 5V system, be sure to place the GND of C01 in the circuit given above as close as possible to
Pin 2 and Pin 6 of the hybrid IC. Also, to achieve accurate current settings, be sure to connect Vref GND to Pin 18
(S.G) used to set the current and to the point where P.G1 and P.G2 share a connection.
[Input pins]
•
If VDD is being applied, use care that each input pin does not apply a negative voltage less than -0.3V to S.G, Pin 18,
and do not apply a voltage greater than or equal to VDD voltage.
•
Do not wire by connecting the circuit pattern on the P.C.B side to Pins 7, 8, or 11 on the N.C. shown in the internal
block diagram.
•
Apply 2.5V high level input to pins 10, 12, 13, 14, 15, and 17.
•
Since the input pins do not have built-in pull-up resistors, when the open-collector type pins 10, 12, 13, 14, 15, and 17
are used as inputs, a 1 to 20kΩ pull-up resistor (to VDD) must be used.
At this time, use a device for the open collector driver that has output current specifications that pull the voltage down
to less than 0.8V at Low level (less than 0.8V at Low level when IOL=5mA).
[Current setting Vref]
•
Considering the specifications of the Vref input bias current, IIB, a value of 1kΩ or less is recommended for R02.
If the motor current is temporarily reduced, the circuit given below (STK672-630A-E: IOH>0.2A, STK672-640A-E:
IOH>0.3A) is recommended.
5V
R01
Vref
R3
R02
R01
Vref
R3
5V
R02
•
Motor current peak value IOH setting
IOH
0
IOH=(Vref÷4.9)
÷Rs
The value of 4.9 in Equation above represents the Vref voltage as divided by a circuit inside the control IC.
Vref=(R02÷ (R01+R02))
×5V(or
3.3V)
Rs is an internal current detection resistor value of the hybrid IC.
