STM32F205xx
STM32F207xx
ARM
®
-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM, USB
OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera
Datasheet
-
production data
Features
•
Core: ARM
®
32-bit Cortex
®
-M3 CPU (120 MHz
max) with Adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait state execution
performance from Flash memory, MPU,
150 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1)
•
Memories
– Up to 1 Mbyte of Flash memory
– 512 bytes of OTP memory
– Up to 128 + 4 Kbytes of SRAM
– Flexible static memory controller that
supports Compact Flash, SRAM, PSRAM,
NOR and NAND memories
– LCD parallel interface, 8080/6800 modes
•
Clock, reset and supply management
– From 1.8 to 3.6 V application supply + I/Os
– POR, PDR, PVD and BOR
– 4 to 26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
•
Low-power modes
– Sleep, Stop and Standby modes
– V
BAT
supply for RTC, 20 × 32 bit backup
registers, and optional 4 KB backup SRAM
•
3 × 12-bit, 0.5 µs ADCs with up to 24 channels
and up to 6 MSPS in triple interleaved mode
•
2 × 12-bit D/A converters
•
General-purpose DMA: 16-stream controller
with centralized FIFOs and burst support
•
Up to 17 timers
– Up to twelve 16-bit and two 32-bit timers,
up to 120 MHz, each with up to four
IC/OC/PWM or pulse counter and
quadrature (incremental) encoder input
•
LQFP64 (10 × 10 mm)
LQFP100 (14 × 14 mm)
LQFP144 (20 × 20 mm)
LQFP176 (24 × 24 mm)
UFBGA176
(10 × 10 mm)
WLCSP64+2
(0.400 mm pitch)
•
Debug mode: Serial wire debug (SWD), JTAG,
and Cortex
®
-M3 Embedded Trace Macrocell™
•
Up to 140 I/O ports with interrupt capability:
– Up to 136 fast I/Os up to 60 MHz
– Up to 138 5 V-tolerant I/Os
•
Up to 15 communication interfaces
– Up to 3 × I
2
C interfaces (SMBus/PMBus)
– Up to four USARTs and two UARTs
(7.5 Mbit/s, ISO 7816 interface, LIN, IrDA,
modem control)
– Up to three SPIs (30 Mbit/s), two with
muxed I
2
S to achieve audio class accuracy
via audio PLL or external PLL
– 2 × CAN interfaces (2.0B Active)
– SDIO interface
•
Advanced connectivity
– USB 2.0 full-speed device/host/OTG
controller with on-chip PHY
– USB 2.0 high-speed/full-speed
device/host/OTG controller with dedicated
DMA, on-chip full-speed PHY and ULPI
– 10/100 Ethernet MAC with dedicated DMA:
supports IEEE 1588v2 hardware, MII/RMII
•
8- to 14-bit parallel camera interface
(48 Mbyte/s max.)
•
CRC calculation unit
•
96-bit unique ID
August 2016
This is information on a product in full production.
DocID15818 Rev 15
1/184
www.st.com
STM32F20xxx
Table 1. Device summary
Reference
STM32F205xx
Part numbers
STM32F205RB, STM32F205RC, STM32F205RE, STM32F205RF, STM32F205RG
STM32F205VB, STM32F205VC, STM32F205VE, STM32F205VF, STM32F205VG
STM32F205ZC, STM32F205ZE, STM32F205ZF, STM32F205ZG
STM32F207IC, STM32F207IE, STM32F207IF, STM32F207IG
STM32F207VC, STM32F207VE, STM32F207VF, STM32F207VG
STM32F207ZC, STM32F207ZE, STM32F207ZF, STM32F207ZG
STM32F207xx
2/184
DocID15818 Rev 15
STM32F20xxx
Contents
Contents
1
2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.1
Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
3.13
3.14
3.15
3.16
ARM
®
Cortex
®
-M3 core with embedded Flash and SRAM . . . . . . . . . . . 21
Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . . 21
Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 22
Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Flexible static memory controller (FSMC) . . . . . . . . . . . . . . . . . . . . . . . . 24
Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 24
External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . . . 25
Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.16.1
3.16.2
3.16.3
Regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Regulator OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Regulator ON/OFF and internal reset ON/OFF availability . . . . . . . . . . 31
3.17
3.18
3.19
3.20
Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . . . 31
Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
V
BAT
operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.20.1
3.20.2
3.20.3
Advanced-control timers (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . 33
General-purpose timers (TIMx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Basic timers TIM6 and TIM7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
DocID15818 Rev 15
3/184
6
Contents
3.20.4
3.20.5
3.20.6
STM32F20xxx
Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3.21
3.22
3.23
3.24
3.25
3.26
3.27
3.28
3.29
3.30
3.31
3.32
3.33
3.34
3.35
3.36
3.37
3.38
Inter-integrated circuit interface (I²C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Universal synchronous/asynchronous receiver transmitters
(UARTs/USARTs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Inter-integrated sound (I
2
S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
SDIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Ethernet MAC interface with dedicated DMA and IEEE 1588 support . . . 37
Controller area network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . . 38
Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . . . 38
Audio PLL (PLLI2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
True random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . 39
GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . . 39
ADCs (analog-to-digital converters) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
DAC (digital-to-analog converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4
5
6
Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
6.1
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
6.1.6
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4/184
DocID15818 Rev 15
STM32F20xxx
6.1.7
Contents
Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
6.2
6.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
6.3.8
6.3.9
6.3.10
6.3.11
6.3.12
6.3.13
6.3.14
6.3.15
6.3.16
6.3.17
6.3.18
6.3.19
6.3.20
6.3.21
6.3.22
6.3.23
6.3.24
6.3.25
6.3.26
6.3.27
6.3.28
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
VCAP1/VCAP2 external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Operating conditions at power-up / power-down (regulator ON) . . . . . . 76
Operating conditions at power-up / power-down (regulator OFF) . . . . . 76
Embedded reset and power control block characteristics . . . . . . . . . . . 77
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Wakeup time from low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
PLL spread spectrum clock generation (SSCG) characteristics . . . . . . 98
Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 103
I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
V
BAT
monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
FSMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Camera interface (DCMI) timing specifications . . . . . . . . . . . . . . . . . . 150
SD/SDIO MMC card host interface (SDIO) characteristics . . . . . . . . . 150
RTC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
7
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
7.1
7.2
7.3
LQFP64 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
WLCSP64+2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
LQFP100 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
DocID15818 Rev 15
5/184
6
