STM32F722xx
STM32F723xx
Arm
®
Cortex
®
-M7 32b MCU+FPU, 462DMIPS, up to 512KB Flash
/256+16+4KB RAM, USB OTG HS/FS, 18 TIMs, 3 ADCs, 21 com IF
Datasheet
-
production data
Features
•
Core: Arm
®
32-bit Cortex
®
-M7 CPU with FPU,
adaptive real-time accelerator (ART
Accelerator™) and L1-cache: 8 Kbytes of data
cache and 8 Kbytes of instruction cache,
allowing 0-wait state execution from embedded
Flash memory and external memories,
frequency up to 216 MHz, MPU,
462 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1)
and DSP instructions.
•
Memories
– Up to 512 Kbytes of Flash memory with
protection mechanisms (read and write
protections, proprietary code readout
protection (PCROP))
– 528 bytes of OTP memory
– SRAM: 256 Kbytes (including 64 Kbytes of
data TCM RAM for critical real-time data) +
16 Kbytes of instruction TCM RAM (for
critical real-time routines) + 4 Kbytes of
backup SRAM (available in the lowest
power modes)
– Flexible external memory controller with up
to 32-bit data bus: SRAM, PSRAM,
SDRAM/LPSDR SDRAM, NOR/NAND
memories
•
Dual mode Quad-SPI
•
Clock, reset and supply management
– 1.7 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– Dedicated USB power
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC (1%
accuracy)
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
•
Low-power
– Sleep, Stop and Standby modes
FBGA
LQFP64 (10 × 10 mm)
LQFP100 (14 × 14 mm)
LQFP144 (20 × 20 mm)
LQFP176 (24 x 24 mm)
UFBGA144 (7 x 7 mm)
UFBGA176 (10 x 10 mm)
WLCSP100
(0.4 mm pitch)
– V
BAT
supply for RTC, 32×32 bit backup
registers + 4 Kbytes of backup SRAM
•
3×12-bit, 2.4 MSPS ADC: up to 24 channels
and 7.2 MSPS in triple interleaved mode
•
2×12-bit D/A converters
•
Up to 18 timers: up to thirteen 16-bit (1x low-
power 16-bit timer available in Stop mode) and
two 32-bit timers, each with up to 4
IC/OC/PWMs or pulse counter and quadrature
(incremental) encoder inputs. All 15 timers
running up to 216 MHz. 2x watchdogs, SysTick
timer
•
General-purpose DMA: 16-stream DMA
controller with FIFOs and burst support
•
Debug mode
– SWD & JTAG interfaces
– Cortex
®
-M7 Trace Macrocell™
•
Up to 140 I/O ports with interrupt capability
– Up to 136 fast I/Os up to 108 MHz
– Up to 138 5 V-tolerant I/Os
•
Up to 21 communication interfaces
– Up to 3× I
2
C interfaces (SMBus/PMBus)
– Up to 4 USARTs/4 UARTs (27 Mbit/s,
ISO7816 interface, LIN, IrDA, modem
control)
– Up to 5 SPIs (up to 54 Mbit/s), 3 with
muxed simplex I
2
Ss for audio class
accuracy via internal audio PLL or external
clock
– 2 x SAIs (serial audio interface)
April 2018
This is information on a product in full production.
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STM32F722xx STM32F723xx
– 1 x CAN (2.0B active)
– 2 x SDMMCs
•
True random number generator
•
CRC calculation unit
•
Advanced connectivity
•
RTC: subsecond accuracy, hardware calendar
– USB 2.0 full-speed device/host/OTG
•
96-bit unique ID
controller with on-chip PHY
– USB 2.0 high-speed/full-speed
device/host/OTG controller with dedicated
DMA, on-chip full-speed PHY and on-chip
Hi-speed PHY or ULPI depending on the
part number
Table 1. Device summary
Reference
STM32F722xx
STM32F723xx
Part number
STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC,
STM32F722ZC, STM32F722VC, STM32F722RC
STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC
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Contents
Contents
1
2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.1
2.2
Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 17
STM32F723xx versus STM32F722xx LQFP144/LQFP176 packages: . . 19
3
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
3.13
3.14
3.15
Arm
®
Cortex
®
-M7 with FPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 22
Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
AXI-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Flexible memory controller (FMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Quad-SPI memory interface (QUADSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 25
Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 26
External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . . . 26
Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.15.1
3.15.2
Internal reset ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Internal reset OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Regulator OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Regulator ON/OFF and internal reset ON/OFF availability . . . . . . . . . . 35
3.16
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.16.1
3.16.2
3.16.3
3.17
3.18
3.19
3.20
Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . . . 35
Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
V
BAT
operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
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Contents
3.20.1
3.20.2
3.20.3
3.20.4
3.20.5
3.20.6
3.20.7
STM32F722xx STM32F723xx
Advanced-control timers (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . 39
General-purpose timers (TIMx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Basic timers TIM6 and TIM7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Low-power timer (LPTIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.21
3.22
3.23
3.24
3.25
3.26
3.27
3.28
3.29
3.30
3.31
3.32
3.33
3.34
3.35
3.36
3.37
Inter-integrated circuit interface (I
2
C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Universal synchronous/asynchronous receiver transmitters (USART) . . 42
Serial peripheral interface (SPI)/inter- integrated sound interfaces (I2S) . 43
Serial audio interface (SAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Audio PLL (PLLI2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Audio PLL (PLLSAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
SD/SDIO/MMC card host interface (SDMMC) . . . . . . . . . . . . . . . . . . . . . 44
Controller area network (bxCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . . 45
Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . . . 45
Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Analog-to-digital converters (ADCs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Digital-to-analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
4
5
6
Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
6.1
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
6.1.1
6.1.2
6.1.3
6.1.4
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
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6.1.6
6.1.7
Contents
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 102
6.2
6.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
6.3.8
6.3.9
6.3.10
6.3.11
6.3.12
6.3.13
6.3.14
6.3.15
6.3.16
6.3.17
6.3.18
6.3.19
6.3.20
6.3.21
6.3.22
6.3.23
6.3.24
6.3.25
6.3.26
6.3.27
6.3.28
6.3.29
6.3.30
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
VCAP1/VCAP2 external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Operating conditions at power-up / power-down (regulator ON) . . . . . 107
Operating conditions at power-up / power-down (regulator OFF) . . . . 107
Reset and power control block characteristics . . . . . . . . . . . . . . . . . . 107
Over-drive switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Wakeup time from low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . 127
External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 133
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
PLL spread spectrum clock generation (SSCG) characteristics . . . . . 137
USB OTG HS PHY PLLs characteristics (on STM32F723xx devices) 139
USB OTG HS PHY regulator characteristics (on
STM32F723xx devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
USB HS PHY external resistor characteristics (on
STM32F723xx devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 143
I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
RTC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
V
BAT
monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
Reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
FMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
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