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STM6777SYGWY6F

1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, ROHS COMPLIANT, MO-178CAA, SOT-23, 5 PIN

器件类别:电源/电源管理    电源电路   

厂商名称:ST(意法半导体)

厂商官网:http://www.st.com/

器件标准:  

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
ST(意法半导体)
零件包装代码
SOIC
包装说明
LSSOP,
针数
5
Reach Compliance Code
compli
ECCN代码
EAR99
其他特性
RESET THRESHOLD VOLTAGE ARE 2.925 AND 2.188 VOLTS
可调阈值
NO
模拟集成电路 - 其他类型
POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码
R-PDSO-G5
长度
2.9 mm
信道数量
1
功能数量
1
端子数量
5
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
LSSOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
峰值回流温度(摄氏度)
NOT SPECIFIED
座面最大高度
1.45 mm
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
0.8 V
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
温度等级
INDUSTRIAL
端子形式
GULL WING
端子节距
0.95 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
1.6 mm
文档预览
STM6717/6718/6719/6720
STM6777/6778/6779/6780
Dual/triple ultra-low voltage supervisors
with push-button reset (with delay option)
Features
Primary supply (V
CC1
) monitor.
Fixed (factory-programmed) reset thresholds:
4.63 V to 1.58 V
Secondary supply (V
CC2
) monitor
(STM6717/18/19/20/77/78)
Fixed (factory-programmed) reset thresholds:
3.08 V to 0.79 V
Tertiary supply monitor (using externally
adjustable RSTIN): 0.626 V internal reference
RST outputs (push-pull or open drain); state
guaranteed if V
CC1
or V
CC2
0.8 V
Reset delay time (t
rec
) on power-up: 13.2 ms,
210 ms, 900 ms (typ)
Manual reset input (MR)
Optional delayed manual reset input (MRC)
with external capacitor (STM6777/78/79/80)
Low supply current - 11 µA (typ),
V
CC1
= V
CC2
= 3.6 V
Operating temperature: –40 °C to 85 °C
(industrial grade)
Device summary
Monitored voltages
Part
number
STM6717
STM6718
STM6719
STM6720
STM6777
STM6778
STM6779
STM6780
V
CC1
V
CC2
RSTIN
Manual reset Delayed MR
input (MR)
pin (MRC)
Reset output (RST)
Active-low
(push-pull)
Active-low
(open drain)
Package
SOT23-5 (WY)
SOT23-6 (WB)
Table 1.
WY
WY
WB
WB
WB
WB
WB
WB
August 2011
Doc ID 11469 Rev 8
1/30
www.st.com
1
Contents
STM6717/6718/6719/6720/STM6777/6778/6779/6780
Contents
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1
Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.1.1
1.1.2
1.1.3
1.1.4
1.1.5
1.1.6
1.1.7
Active-low, push-pull reset output (RST) - STM6718/20/78/80 . . . . . . . . 7
Active-low, open drain reset output (RST) - STM6717/19/77/79 . . . . . . . 7
Push-button reset input (MR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Manual reset delay input (MRC) - STM6777/78/79/80) . . . . . . . . . . . . . . 8
Primary supply voltage monitoring input (V
CC1
) . . . . . . . . . . . . . . . . . . . 8
Secondary supply voltage monitoring input (V
CC2
) . . . . . . . . . . . . . . . . . 8
Adjustable reset comparator input (RSTIN; STM6719/20/79/80) . . . . . . 8
2
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1
Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3
4
5
6
7
8
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2/30
Doc ID 11469 Rev 8
STM6717/6718/6719/6720/STM6777/6778/6779/6780
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
t
MLMH
minimum pulse width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
SOT23-5 – 5-lead small outline transistor package mechanical data. . . . . . . . . . . . . . . . . 23
SOT23-6 – 6-lead small outline transistor package mechanical data. . . . . . . . . . . . . . . . . 24
Carrier tape dimensions for SOT23-5L and SOT23-6L . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Doc ID 11469 Rev 8
3/30
List of figures
STM6717/6718/6719/6720/STM6777/6778/6779/6780
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Logic diagram (STM6717/18) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Logic diagram (STM6777/78) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Logic diagram (STM6719/20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Logic diagram (STM6779/80) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
STM6717/18 SOT23-5 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
STM6777/78 SOT23-6 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
STM6719/20 SOT23-6 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
STM6779/80 SOT23-6 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
STM67xx interface to processor with bi-directional reset pins . . . . . . . . . . . . . . . . . . . . . . 10
Ensuring RST valid to V
CC
= 0 (active-low, push-pull outputs). . . . . . . . . . . . . . . . . . . . . . 10
Supply current vs. temperature (V
CC1
= 5.5 V; V
CC2
= 3.6 V) . . . . . . . . . . . . . . . . . . . . . . 11
Supply current vs. temperature (V
CC1
= 3.6 V; V
CC2
= 2.75 V) . . . . . . . . . . . . . . . . . . . . . 11
Supply current vs. temperature (V
CC1
= 3.0 V; V
CC2
= 2.0 V) . . . . . . . . . . . . . . . . . . . . . . 12
Supply current vs. temperature (V
CC1
= 2.0 V; V
CC2
= 1.0 V) . . . . . . . . . . . . . . . . . . . . . . 12
Normalized V
CC
reset time-out period vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Maximum V
CC
transient duration vs. reset threshold overdrive . . . . . . . . . . . . . . . . . . . . . 13
Normalized V
RST1
threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Normalized V
RST2
threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Reset input threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
V
CC1
-to-reset delay vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Reset input-to-reset output delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
MR-to-reset output delay vs. temperature (V
CC1
= 3.6V) . . . . . . . . . . . . . . . . . . . . . . . . . . 16
AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
MR timing waveform (STM6717/18/19/20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
MR timing waveform (STM6777/78/79/80) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
SOT23-5 – 5-lead small outline transistor package mechanical drawing . . . . . . . . . . . . . . 23
SOT23-6 – 6-lead small outline transistor package mechanical drawing . . . . . . . . . . . . . . 24
Carrier tape for SOT23-5L and SOT23-6L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4/30
Doc ID 11469 Rev 8
STM6717/6718/6719/6720/STM6777/6778/6779/6780
Description
1
Description
The STM6717/18/19/20 and STM6777/78/79/80 supervisors are a family of low-voltage/low-
supply current processor (micro or DSP) supervisors, designed to monitor two (or three)
system power supply voltages. They are targeted at applications such as set-top boxes
(STBs), portable, battery-powered systems, networking, and communication systems.
All device options have a push-button-type manual reset input (MR). The
STM6777/78/79/80 also includes an option which enables the user to delay the start of the
manual reset process from 6 µs (MRC pin left open) or more with external capacitor. The
delay is implemented by connecting the appropriately sized capacitor between the MRC pin
and V
SS
(typical 4 s delay with a 3.3 µF capacitor, see
Table 7 on page 21).
Two of the three supplies monitored (V
CC1
and V
CC2
) have fixed (customer-selectable,
factory-trimmed) thresholds (V
RST1
and V
RST2
). The third voltage is monitored using an
externally adjustable RSTIN threshold (0.626 V internal reference).
If any of the three monitored voltages drop below its factory-trimmed or adjustable
thresholds, or if MR is asserted to logic low, a RST is asserted (driven low). Once asserted,
RST is maintained at low for a minimum delay period (t
rec
) after ALL supplies rise above
their respective thresholds and MR returns to high. These devices are guaranteed to be in
the correct reset output logic state when V
CC1
and/or V
CC2
is greater than 0.8 V.
These devices are available in standard 5-pin or 6-pin SOT23 packages (see
Table 1 on
page 1).
Doc ID 11469 Rev 8
5/30
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