STP16N65M2,
STU16N65M2
N-channel 650 V, 0.32
Ω
typ., 11 A MDmesh M2
Power MOSFETs in TO-220 and IPAK packages
Datasheet
−
production data
Features
Order code
STP16N65M2
STU16N65M2
V
DS
@ T
Jmax
710 V
710 V
R
DS(on)
max
0.36
Ω
0.36
Ω
I
D
11 A
11 A
•
Extremely low gate charge
•
Excellent output capacitance (C
oss
) profile
•
100% avalanche tested
•
Zener-protected
Applications
Figure 1. Internal schematic diagram
, TAB
•
Switching applications
Description
These devices are N-channel Power MOSFETs
developed using MDmesh™ M2 technology.
Thanks to their strip layout and improved vertical
structure, the devices exhibit low on-resistance
and optimized switching characteristics, rendering
them suitable for the most demanding high
efficiency converters.
AM15572v1
Table 1. Device summary
Order codes
STP16N65M2
STU16N65M2
Marking
16N65M2
16N65M2
Package
TO-220
IPAK
Packaging
Tube
Tube
October 2014
This is information on a product in full production.
DocID027086 Rev 1
1/16
www.st.com
Contents
STP16N65M2, STU16N65M2
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
Test circuits
.............................................. 9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1
4.2
TO-220, STP16N65M2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
IPAK, STU16N65M2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16
DocID027086 Rev 1
STP16N65M2, STU16N65M2
Electrical ratings
1
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
V
GS
I
D
I
D
I
DM (1)
P
TOT
dv/dt
(2)
dv/dt
(3)
T
stg
T
j
Parameter
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Storage temperature
- 55 to 150
Max. operating junction temperature
°C
Value
± 25
11
6.9
44
110
15
50
Unit
V
A
A
A
W
V/ns
V/ns
1. Pulse width limited by safe operating area.
2. I
SD
≤
11 A, di/dt
≤
400 A/µs; V
DS peak
< V
(BR)DSS
, V
DD
=400 V.
3. V
DS
≤
520 V
Table 3. Thermal data
Value
Symbol
R
thj-case
R
thj-amb
Parameter
TO-220
Thermal resistance junction-case max
Thermal resistance junction-amb max
(1)
62.50
1.14
100
IPAK
°C/W
°C/W
Unit
1. When mounted on 1 inch² FR-4, 2 Oz copper board
Table 4. Avalanche characteristics
Symbol
I
AR
E
AS
Parameter
Avalanche current, repetitive or not
repetitive (pulse width limited by T
jmax
)
Single pulse avalanche energy (starting
T
j
=25°C, I
D
= I
AR
; V
DD
=50)
Value
1.9
360
Unit
A
mJ
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Electrical characteristics
STP16N65M2, STU16N65M2
2
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 5. On /off states
Symbol
V
(BR)DSS
Parameter
Drain-source
breakdown voltage
Zero gate voltage
drain current
Gate-body leakage
current
Test conditions
V
GS
= 0, I
D
= 1 mA
V
GS
= 0, V
DS
= 650 V
V
GS
= 0, V
DS
= 650 V,
T
C
=125 °C
V
DS
= 0, V
GS
= ± 25 V
2
3
0.32
Min.
650
1
100
±10
4
0.36
Typ.
Max.
Unit
V
µA
µA
µA
V
Ω
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA
Static drain-source
on-resistance
V
GS
= 10 V, I
D
= 5.5 A
Table 6. Dynamic
Symbol
C
iss
C
oss
C
rss
C
oss eq.(1)
R
G
Q
g
Q
gs
Q
gd
Parameter
Input capacitance
Output capacitance
Reverse transfer
capacitance
Equivalent output
capacitance
Intrinsic gate
resistance
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
= 520 V, I
D
= 11 A,
V
GS
= 10 V (see
Figure 17)
V
GS
= 0, V
DS
= 100 V,
f = 1 MHz
Test conditions
Min.
-
-
-
V
GS
= 0, V
DS
= 0 to 520 V
f = 1 MHz open drain
-
-
-
-
-
Typ.
718
32
1.1
189
5.2
19.5
4
8.3
Max.
-
-
-
-
-
-
-
-
Unit
pF
pF
pF
pF
Ω
nC
nC
nC
1. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80% V
DSS
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DocID027086 Rev 1
STP16N65M2, STU16N65M2
Electrical characteristics
Table 7. Switching times
Symbol
t
d(on)
t
r
t
d(off)
t
f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DD
= 325 V, I
D
= 5.5 A,
R
G
= 4.7
Ω,
V
GS
= 10 V
(see
Figure 16
and
21)
Test conditions
Min.
-
-
-
-
Typ.
11.3
8.2
36
11.3
Max.
-
-
-
-
Unit
ns
ns
ns
ns
Table 8. Source drain diode
Symbol
I
SD
I
SDM (1)
V
SD (2)
t
rr
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 11 A, di/dt = 100 A/µs
V
DD
= 60 V, T
j
=150 °C
(see
Figure 18)
I
SD
= 11 A, di/dt = 100 A/µs
V
DD
= 60 V (see
Figure 18)
V
GS
= 0, I
SD
= 11 A
Test conditions
Min.
-
-
-
-
-
-
-
-
-
342
3.5
20.4
458
4.6
20.5
Typ.
Max. Unit
11
44
1.6
A
A
V
ns
µC
A
ns
µC
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
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