P Channel Enhancement Mode MOSFET
-
5.6A
DESCRIPTION
ST9435 is the P-Channel logic enhancement mode power field effect transistor which
is produced using high cell density, DMOS trench technology. This high density
process is especially tailored to minimize on-state resistance. These devices are
particularly suited for low voltage application such as battery pack, notebook
computer power management, and other battery powered circuits.
FEATURE
-30V/-5.6A, R
DS(ON)
= 60mΩ
@V
GS
= -10V
-30V/-5.0A, R
DS(ON)
= 70mΩ
@V
GS
= -6.0V
-30V/-4.4A, R
DS(ON)
= 80mΩ
@V
GS
= -4.5V
Super high density cell design for
extremely low R
DS(ON)
Exceptional on-resistance and maximum DC
current capability
SOP-8 package design
PART MARKING
SOP-8
STP9435
PIN CONFIGURATION
SOP-8
ORDERING INFORMATION
Part Number
STP9435S8RG
STP9435S8TG
Package
SOP-8P
SOP-8P
Part Marking
STP9435
STP9435
※
Process Code : A ~ Z ; a ~ z
※
STP9435S8RG S8 : SOP-8 ; R : Tape Reel ; G : Pb – Free
※
STP9435S8TG S8 : SOP-8 ; T : Tube ; G : Pb – Free
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
Copyright © 2007, Stanson Corp.
STP9435 2007. V1
P Channel Enhancement Mode MOSFET
-
5.6A
STP9435
ABSOULTE MAXIMUM RATINGS
(Ta = 25
℃
Unless otherwise noted )
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
(TJ=150
℃
)
Pulsed Drain Current
Continuous Source Current (Diode Conduction)
Power Dissipation
Operation Junction Temperature
Storgae Temperature Range
Thermal Resistance-Junction to Ambient
TA=25℃
TA=70
℃
TA=25℃
TA=70
℃
Symbol
VDSS
VGSS
ID
IDM
IS
PD
TJ
TSTG
RθJA
Typical
-30
±20
-6.5
-4.6
-30
-2.3
2.5
1.6
150
-55/150
70
Unit
V
V
A
A
A
W
℃
℃
℃
/W
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
Copyright © 2007, Stanson Corp.
STP9435 2007. V1
P Channel Enhancement Mode MOSFET
-
5.6A
STP9435
ELECTRICAL CHARACTERISTICS
( Ta = 25℃ Unless otherwise noted )
Parameter
Symbol
Condition
Min
Typ
Max
Unit
Static
Drain-Source
Breakdown Voltage
Gate Threshold
Voltage
Gate Leakage Current
Zero Gate Voltage
Drain Current
On-State Drain
Current
Drain-source On-
Resistance
Forward
Transconductance
Diode Forward Voltage
Dynamic
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse
TransferCapacitance
Turn-On Time
Turn-Off Time
Q
g
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
tr
t
d(off)
tf
V
DS
==-15V,VGS=0V
f=1MHz
V
DS
=-15V,V
GS
=-10V
I
D
≡-3.5A
16
2.3
4.5
680
120
75
14
V
DD
=-15V,R
L
=15Ω
I
D
=-1A,V
GEN
=-10V
R
G
=6Ω
16
43
30
25
26
70
52
nS
pF
24
nC
V
(BR)DSS
V
GS(th)
I
GSS
I
DSS
I
D(on)
R
DS(on)
gfs
V
SD
V
GS
=0V,ID=-250uA
V
DS
=V
GS
,ID=-
250uA
V
DS
=0V,V
GS
=±20V
V
DS
=-24V,V
GS
=0V
V
DS
=-24V,V
GS
=0V
T
J
=85℃
V
DS
=-5V,V
GS
=-4.5V
V
GS
=-10V,I
D
=-5.6A
V
GS
=-6.0V,I
D
=-5.0A
V
GS
=-4.5V,I
D
=-4.4A
V
DS
=-15V,I
D
=-5.7V
I
S
=-2.3A,V
GS
=0V
-10
47
52
58
13
-0.8
-1.2
60
70
80
-30
-1.0
-3.0
±100
V
V
nA
-1
-5
uA
A
mΩ
S
V
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
Copyright © 2007, Stanson Corp.
STP9435 2007. V1
P Channel Enhancement Mode MOSFET
-
5.6A
STP9435
TYPICAL CHARACTERICTICS
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
Copyright © 2007, Stanson Corp.
STP9435 2007. V1
P Channel Enhancement Mode MOSFET
-
5.6A
TYPICAL CHARACTERICTICS
STP9435
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
Copyright © 2007, Stanson Corp.
STP9435 2007. V1
FPGA/CPLD
