Micrel, Inc.
2.5V/3V, 3.0GHz CML
AnyGate
®
ANY LOGIC
WITH 50
Ω
or 100
Ω
OUTPUTS
SuperLite™
SY55851
SuperLite™
SY55851A
SY55851
SY55851A
FEATURES
s
Guaranteed AC parameters over temperature:
• f
MAX
> 3.0GHz (SY55851A)
• t
r
/ t
f
< 100ps
• Propagation delay < 280ps
s
Guaranteed operation over –40
°
C to +85
°
C
temperature range
s
Wide supply voltage range: 2.3V to 3.6V
s
Single IC provides 8 logic functions
s
2:1 MUX capability
s
Fully differential I/O
s
Source terminated CML outputs for fast edge rates:
• SY55851 for 100
Ω
load
• SY55851A for 50
Ω
load
s
Guaranteed matched propagation delays:
• Select (S)-to-out: < 280ps
• Input (A and B)-to-out: < 280ps
s
Accepts PECL, LVPECL, CML input signals
s
Functions as a PECL/LVPECL-to-CML translator
s
Available in a 10-pin (3mm
×
3mm) MSOP package
SuperLite™
DESCRIPTION
The SY55851 and SY55851A are highly flexible,
universal logic gates capable of up to 3.0GHz operation
(SY55851A). These AnyGate
®
differential logic devices
will produce all possible logic functions of two Boolean
variables. They can be configured as any of the following
gates: AND, NAND, OR, NOR, XOR, XNOR, DELAY,
NEGATION (NOT). The SY55851 and SY55851A can
also function as a 2-input multiplexer.
The SY55851 has an output stage optimized for 100Ω
loads, and the SY55851A is optimized for 50Ω loads.
The differential inputs for both devices are normally
terminated with a single resistor (100Ω) between the true
and complement pins.
APPLICATIONS
s
s
s
s
Port bypass
Data communication systems
Wireless communication systems
Telecom systems
FUNCTIONAL BLOCK DIAGRAM
2
S
A
B
2
0 S
1
2
2
Q
AnyGate is a registered trademarks of Micrel, Inc.
SuperLite is trademarks of Micrel, Inc.
M9999-072909
hbwhelp@micrel.com or (408) 955-1690
Rev.: E
Amendment: /0
1
Issue Date: July 2009
Micrel, Inc.
SuperLite™
SY55851
SY55851A
PACKAGE/ORDERING INFORMATION
Ordering Information
(1)
S 1
/S 2
A 3
/A 4
GND 5
10 VCC
9 /B
8 B
7 Q
6 /Q
Part Number
SY55851UKI
SY55851UKITR
(2)
SY55851AUKI
SY55851AUKITR
(2)
SY55851UKG
(3)
SY55851UKGTR
(2, 3)
SY55851AUKG
(3)
SY55851AUKGTR
(2, 3)
Package
Type
K10-1
K10-1
K10-1
K10-1
K10-1
K10-1
K10-1
K10-1
Operating
Range
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Package
Marking
851U
851U
851A
851A
851U with
Pb-Free bar-line indicator
851U with
Pb-Free bar-line indicator
851A with
Pb-Free bar-line indicator
851A with
Pb-Free bar-line indicator
Lead
Finish
Sn-Pb
Sn-Pb
Sn-Pb
Sn-Pb
Pb-Free
NiPdAu
Pb-Free
NiPdAu
Pb-Free
NiPdAu
Pb-Free
NiPdAu
8-Pin MSOP (K10-1)
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
3. Pb-Free package recommended for new designs.
PIN DESCRIPTION
Pin Number
1, 2
Pin Name
S, /S
Pin Function
CML, PECL, LVPECL Input Selector: This differential CML input is one of the inputs to
the logic block. It represents either one Boolean input for a 2-variable logic function,
or the select input for a 2-input MUX.
CML, PECL, LVPECL Input: This is one of the differential inputs to the logic block. For
a 2-variable logic function, it is either a constant value or a Boolean input. For a 2-
input MUX, this signal represents the output when S is set to logic zero.
Ground.
Differential CML Output: This is the differential CML output for the logic block. For
termination guidelines, see Figure 3.
CML, PECL, LVPECL Input: This is one of the differential inputs to the logic block. For
a 2-variable logic function, it is either a constant value or a Boolean input. For a 2-
input MUX, this signal represents the output when S is set to logic one.
V
CC
.
3, 4
A, /A
5
6, 7
8, 9
GND
/Q, Q
B, /B
10
VCC
M9999-072909
hbwhelp@micrel.com or (408) 955-1690
2
Micrel, Inc.
SuperLite™
SY55851
SY55851A
FUNCTIONAL DESCRIPTION
Establishing Static Logic Inputs
The true pin of an input pair is internally biased to ground
through a 75kΩ resistor. The complement pin of an input
pair is internally biased to V
CC
/2 through an internal voltage
divider consisting of two 75kΩ resistors. Since some logic
functions necessitate an output to be connected to two
inputs, SY55851/A inputs have no internal terminations.
Typically, one resistor between the true and complement
input is all that is required, as per
Figure 3.
To keep an
input at static logic zero at V
CC
≥
3.0V, leave both inputs
unconnected or tie the complement input to V
CC
. For V
CC
<
3.0V applications, connect the complement input to V
CC
and leave the true input unconnected. To make an input
static logic one, connect the true input to V
CC
, and leave
the complement input unconnected. These are the only safe
ways to cause inputs to be at a static value. In particular,
no input pin should be directly connected to ground. All NC
(no connect) pins should be unconnected.
NC
Input
/Input
V
CC
NC
Input
NC
/Input
For V
CC
3.0V Applications
Figure 1. Hard Wiring A Logic “1”
(1)
Note 1.
Input is either A, B, S input, and /Input is either /A, /B, /S input.
NC
VCC
Input
/Input
For V
CC
< 3.0V Applications
Figure 2. Hard Wiring A Logic “0”
(1)
M9999-072909
hbwhelp@micrel.com or (408) 955-1690
3
Micrel, Inc.
SuperLite™
SY55851
SY55851A
TRUTH TABLES
β
AND/NAND
A
α
B
L
H
L
H
β
S
L
L
H
H
α⋅β
Q
L
L
L
H
(α⋅β)
(α⋅
/Q
H
H
H
L
NC
V
CC
α
S
A /S
/A
B
/B
Q
α⋅β
/Q
(α
⋅ β)
L
L
L
L
β
S
A /S
/A
B
/B
OR/NOR
Q
α+β
/Q
(α
+ β)
α
A
L
H
L
H
B
H
H
H
H
β
S
L
L
H
H
α
+
β
Q
L
H
H
H
(α
+
β)
/Q
H
L
L
L
α
V
CC
NC
β
S
A /S
/A
B
/B
XOR/XNOR
α
A
B
H
H
L
L
β
S
L
H
L
H
α⊕β
Q
L
H
H
L
(α ⊕ β)
/Q
H
L
L
H
α
Q
α⊕β
/Q
(α
⊕ β)
L
L
H
H
NC
α
V
CC
S
A /S
/A
B
/B
DELAY/NEGATION
Q
α
/Q
α
α
A
L
H
B
X
X
S
L
L
α
Q
L
H
α
/Q
H
L
V
CC
S
A /S
/A
B
/B
NC
Q
β
/Q
β
A
X
X
β
B
L
H
S
H
H
β
Q
L
H
β
/Q
H
L
β
S
2:1 MUX
A
B
0
S
Q
Q
B
A
/Q
/B
/A
H
L
1
M9999-072909
hbwhelp@micrel.com or (408) 955-1690
4
Micrel, Inc.
SuperLite™
SY55851
SY55851A
CML TERMINATION AND TTL INTERFACE
All inputs accept the output from any other member of
this family. All outputs are source terminated 100Ω or 50Ω
CML differential drivers as shown in Figure 3. All inputs to
the SY55851/A must be externally terminated. SY55851/A
inputs are designed to accept a termination resistor between
the true and complement inputs of a differential pair. 0402
form factor chip resistors will fit with some trace fanout.
V
CC
V
CC
50Ω
100Ω
100Ω
Q
/Q
100Ω
200Ω
100Ω
50Ω
Q
/Q
50Ω
100Ω
50Ω
16mA
8mA
SY55851A
SY55851
Figure 3a. SY55851
(100
Ω
Load CML Output)
Figure 3b. Differentially Terminated SY55851A
(50
Ω
Load CML Output)
V
CC
V
CC
100Ω
100Ω
Q
/Q
100Ω
100Ω
50Ω
100Ω
50Ω
V
CC
V
CC
1k
V
CC
549Ω
S
/S
V
CC
≥
V
CC
(TTL Driver)
SY55851
SY55851A
8mA
TTL
Driver
1k
SY55851
1.47k
Figure 3c. Differentially Terminated SY55851
(50
Ω
Load CML Output)
Figure 4. Interfacing TTL-to-CML Select Inputs
M9999-072909
hbwhelp@micrel.com or (408) 955-1690
5
