SY88349NDL
2.5Gbps Burst-Mode Limiting Amplifier
with Ultra-Fast Signal Assert Timing
General Description
The SY88349NDL is a high-sensitivity, burst-mode
capable limiting post amplifier designed for optical line
terminal (OLT) receiver applications. The SY88349NDL
satisfies the strict timing restrictions of the GPON
standards by providing ultra-fast loss-of-signal (LOS) or
Signal-Detect (SD) output. Auto reset and manual reset
options are provided to control LOS/SD output timing. For
increased flexibility, this device also includes an option to
select between LOS or SD output. The device can be
connected to burst-mode capable transimpedance
amplifiers (TIAs) using AC or DC coupling.
The SY88349NDL generates a high-gain LOS or SD
LVTTL output. A programmable LOS/SD level set pin
(LOS/SD
LVL
) sets the sensitivity of the input amplitude
detection. When LOS/SD SEL pin is left open or tied to
V
CC
, JAM is active high, SD is selected and asserts high if
the input amplitude rises above the threshold sets by
LOS/SD
LVL
and de-asserts low otherwise. When LOS/SD
SEL pin is set low or tied to GND, JAM is active low, LOS
is selected and asserts low if the input amplitude rises
above the threshold sets by LOS/SD
LVL
and de-asserts
high otherwise. The LOS/SD output can be fed back to the
JAM input to maintain output stability under an invalid
signal conditions. Typically, 4dB
5dB SD hysteresis is
provided to prevent chattering.
The SY88349NDL also features a selectable proprietary
noise discriminator that aids by filtering out input signals
that do not qualify as a 2.5Gbps GPON preamble signal in
the initial startup phase. This feature minimizes false SD
asserts that can be triggered by random noise.
The SY88349NDL operates from a single +3.3V power
supply, over temperatures ranging from –40C to +85C.
With its wide bandwidth and high gain, signals up to
2.5Gbps and as small as 5mVpp can be amplified to drive
devices with CML inputs.
Data sheets and support documentation can be found on
Micrel’s web site at
www.micrel.com.
Features
<5ns SD assert (LOS deassert) time
Proprietary noise discriminator feature
Option to AUTO RESET or manual RESET LOS/SD
output
Selectable LOS/SD option
Up to 2.5Gbps operation
Low-noise CML data outputs
5mVpp input sensitivity
High-sensitivity LOS/SD detect
LVTTL LOS/SD output with an external pull-up resistor
Squelching function to disable output
Programmable LOS/SD level set (LOS/SD
LVL
)
Single 3.3V power supply
Available in a 16-pin (3mm
3mm) QFN package
Applications
XGPON.1/GEPON/GPON
Gigabit Ethernet
Fibre Channel
OC-3/12/24/48 SONET/SDH
High-gain line driver and line receiver
Low-gain TIA interface
Markets
FTTH
Datacom/Telecom
Optical transceiver
January 2012
2
M9999-010212-C
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY88349NDL
Ordering Information
Part Number
SY88349NDLMG
SY88349NDLMGTR
(1)
Note:
1. Tape & Reel.
Package Type
Lead-Free 16-Pin 3mm
3mm QFN
Lead-Free 16-Pin 3mm
3mm QFN
Operating Range
–40C to +85C
–40C to +85C
Package Marking
349N with
Pb-Free Bar-Line Indicator
349N with
Pb-Free Bar-Line Indicator
Pin Configuration
16-Pin 3mm
3mm QFN (QFN-16)
Pin Description
Pin Number
1, 4
2
3, 11, 8
Pin Name
DIN, /DIN
VREF
GND
Pin Function
Data Inputs. If AC-coupled, terminate each pin to V
REF
with 50Ω.
Reference Voltage Output. Typically V
CC
– 1.3V.
Device Ground.
LVTTL Input. This pin is internally connected to a 25kΩ pull-up resistor and defaults to HIGH.
When this pin is LOW or tied to ground, the /AUTO RESET function is enabled and SD de-
asserts or LOS asserts within 100ns (typical) after the last high-to -low transition of the burst
input. When this pin is left floating or not connected, the AUTO RESET function is disabled and
the SD de-assert or LOS assert must be forced by using the manual RESET function.
Positive Power Supply.
10
/AUTO RESET
5, 16
VCC
January 2012
3
M9999-010212-C
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY88349NDL
Pin Description (Continued)
Pin Number
Pin Name
Pin Function
LVTTL Input. Apply a high-level signal (2V) to this pin to discharge the time constant and reset
the signal de-assert time or LOS assert time within 5ns. RESET defaults to LOW if left floating.
If the /AUTO RESET function is not used, this RESET function needs to be used to quickly de-
assert the SD or assert LOS. This pin is internally connected to a 25kΩ pull-down resistor and
defaults to LOW.
LVTTL Output. Signal-detect (SD) asserts HIGH when the data input amplitude rises above the
threshold sets by SD
LVL
. Conversely, loss-of-signal (LOS) de-asserts LOW when the data input
amplitude rises above the threshold set by LOS
LVL
.
CML Outputs. When JAM disables the device, output DOUT is forced to logic LOW and output
/DOUT is forced to logic HIGH.
Allows the user to select between whether LOS or SD is outputted on the LOS/SD pin and
whether the noise discriminator is enabled or disabled. Please see Truth Table for more
information. Also controls the polarity of the JAM input. When SD (regardless of the noise
discriminator status) is selected, JAM is active HIGH and LOS/SD (Pin 7) operates as signal
detect. Conversely, when LOS is selected, JAM is active LOW and LOS/SD operates as loss-
of-signal. Pin must be tied to one of the four options and cannot be left open.
Voltage Input. Sets the Loss of Signal/Signal Detect Level. A resistor from this pin to V
CC
sets
the threshold for the data input amplitude at which LOS/SD will be asserted.
LVTTL Input. This JAM input acts as a squelch function and switches its polarity depending on
LOS/SDSEL status. When LOS is selected, this pin is active LOW. When SD is selected, this
pin is active HIGH. To create a squelch function, connect JAM to LOS/SD. When JAM disables
the device, output Q is forced to logic LOW and output /Q is forced to logic HIGH Note that this
input is internally connected to a 25kΩ pull-up resistor.
6
RESET
7
SD/LOS
12, 9
DOUT, /DOUT
13
LOS/SD SEL
14
LOS/SDLVL
15
JAM
Truth Table for SD/LOS Select and Noise Discriminator function
LOS/SDSEL PIN
0Ω to VCC
0Ω to VCC
16KΩ to VCC
16KΩ to VCC
16KΩ to GND
16KΩ to GND
0Ω to GND
0Ω to GND
LOS/SD SELECTION
SD
SD
SD
SD
LOS
LOS
LOS
LOS
NOISE DISCRIMINATOR
Enabled
Enabled
Disabled
Disabled
Disabled
Disabled
Enabled
Enabled
INPUT TO JAM
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
OUTPUTS
Enabled
Disabled
Enabled
Disabled
Disabled
Enabled
Disabled
Enabled
January 2012
4
M9999-010212-C
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY88349NDL
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
)................................... -0.3V to +4.0V
Input Voltage (DIN, /DIN) .......................................0 to V
CC
Output Current (I
OUT
)
Continuous........................................................ ±50mA
Surge .............................................................. ±100mA
EN Voltage ...................................................... -0.3V to V
CC
V
REF
Current .........................................
800μA
to +500μA
SD
LVL
Voltage ....................................................V
REF
to V
CC
Lead Temperature (soldering, 20sec.)..................... 260°C
Storage Temperature (T
s
) ....................... –65°C to +150°C
Operating Ratings
(2)
Supply Voltage (V
CC
).................................... +3.0V to +3.6V
Ambient Temperature (T
A
) ..........................–40°C to +85°C
Junction Temperature (T
J
) ........................–40°C to +125°C
Junction Thermal Resistance
(3)
QFN (
JA
) Still-Air ................................................60°C/W
QFN (
JB
) Junction-to-Board ..............................38°C/W
DC Electrical Characteristics
V
CC
= 3.0 to 3.6V; T
A
= –40C to +85C, typical values at V
CC
= 3.3V, T
A
= 25C.
Symbol
I
CC
LOS/SD
LVL
V
OH
V
OL
V
OFFSET
V
IHCMR(Diff)
V
IHCMR(SE)
V
REF
I
DIN
Parameter
Power Supply Current
LOS/SD
LVL
Voltage
CML Output HIGH Voltage
CML Output LOW Voltage
Input Offset Voltage
Common-Mode Range
(Differential)
Common-Mode Range
(Single Ended )
Reference Voltage
Input Sink Current (DIN and /DIN)
Vin =VIH
Note 4
Note 4
GND
+1.4
GND
+1.2
V
CC
1.48
V
CC
1.32
8.5
Note12
Note 12
Condition
No output load
V
REF
V
CC
0.020
V
CC
0.475
V
CC
0.005
V
CC
0.4
Min.
Typ.
90
Max.
120
V
CC
V
CC
V
CC
0.350
±1
Vcc
V
CC
V
CC
1.16
20
Units
mA
V
V
V
mV
V
V
V
µA
LVTTL DC Electrical Characteristics
V
CC
= 3.0 to 3.6V; T
A
= –40C to +85C, typical values at V
CC
= 3.3V, T
A
= 25C.
Symbol
V
IH
V
IL
I
IH_JAM
I
IL_JAM
I
IH_AR
I
IL_AR
I
IH_RESET
I
IL_RESET
V
OH
V
OL
Parameter
LVTTL Input HIGH Voltage
LVTTL Input LOW Voltage
JAM Input HIGH Current
JAM Input LOW Current
/AUTORESET Input HIGH Current
/AUTORESET Input LOW Current
RESET Input HIGH Current
RESET Input LOW Current
SD/LOS Output HIGH Level
SD/LOS Output LOW Level
V
IN
= V
CC
V
IN
= 2.7V
V
IN
= 0.5V
V
IN
= V
CC
V
IN
= 2.7V
V
IN
= 0.5V
V
IN
= V
CC
V
IN
= 2.7V
V
IN
= 0.5V
I
OH
=
100uA
I
OL
= 100uA
0
2.1
2.7
0.35
0.5
0.3
300
250
0.3
100
20
Condition
Min.
2.0
0.8
20
20
Typ.
Max.
Units
V
V
µA
mA
µA
mA
µA
mA
V
V
January 2012
5
M9999-010212-C
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY88349NDL
AC Electrical Characteristics
V
CC
= 3.0V to 3.6V; R
L
= 50Ω to V
CC
; T
A
= –40C to +85C.
Symbol
t
r
, t
f
t
JAM
t
AUTORESET
t
RESET
t
ON
t
ON_ND
t
JITTER
V
ID
V
OD
SD
AL
/LOS
DL
SD
DL/
/LOS
AL
HYS
L
SD
AM
/LOS
DM
SD
DM
/LOS
AM
HYS
M
SD
AH
/LOS
DH
SD
DH
/LOS
AH
HYS
H
A
V(Diff)
S
21
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Thermal performance assumes the use of a 4-layer PCB. Exposed pad must be soldered to the device’s most negative potential on the PCB
.
4. VIHCMR is defined as common mode range of the VIH level on DIN and /DIN. It is the most positive level of the differential input signal when driven
differentially or is the reference level on Din\ when being driven single ended.
5. Amplifier in limiting mode. Input is a 200MHz square wave.
6. Deterministic jitter measured using 2.5Gbps K28.5 pattern, V
ID
= 10mV
PP
.
7. Random jitter measured using 2.5Gbps K28.7 pattern, V
ID
= 10mV
PP
.
8. SD is the opposite polarity of LOS. Therefore, an SD Assert parameter is equivalent to a LOS de-assert parameter and vice versa.
9. See “Typical Operating Characteristics” for graphs showing input signal vs. SD Assert/LOS de-assert time at various R
LOS/SDLVL
settings.
10. See “Typical Operating Characteristics” for graph showing how to choose a particular R
LOS/SDLVL
for a particular assert and its associated de-assert
amplitude.
11. This specification defines electrical hysteresis as 20log(SD assert/SD de-assert). The ratio between optical hysteresis and electrical hysteresis is
found to vary between 1.5 and 2 depending upon the level of received optical power and ROSA characteristics. Based upon that ratio, the optical
hysteresis corresponding to the electrical hysteresis range 2dB-5dB, shown in the AC characteristics table, will be 1dB-4dB optical hysteresis.
12. V
OL
and V
OH
are measured with outputs loaded with 50 Ohms as shown in Figure 3b and V
OD
is measured in accordance with Figures 3a and/or 3b.
13. All SD Assert (LOS De-Assert) level, SD De-assert (LOS Assert) level and Hysteresis specifications listed above are specified using a 1010 PON
Preamble data pattern at the specified data rate of 2.488 Gbps.
Parameter
Output Rise/Fall Time (20% to 80%)
JAM Enable/Disable Time
SD De-Assert or LOS Assert with
Auto Reset Enabled
RESET Disable Time
SD Assert Time/LOS De-Assert Time
SD Assert Time/LOS De-Assert Time
Deterministic
Random
Differential Input Voltage Swing
Differential Output Voltage Swing
Low SD Assert/LOS De-Assert Level
Low SD De-Assert/LOS Assert Level
Low SD/LOS Hysteresis
Medium SD Assert/LOS De-Assert
Level
Medium SD De-Assert/LOS Assert
Level
Medium SD/LOS Hysteresis
High SD Assert/LOS De-assert Level
High SD De-Assert/ LOS Assert Level
High SD/LOS Hysteresis
Differential Voltage Gain
Single-Ended Small-Signal Gain
Condition
Note 4
Min.
Typ.
Max.
150
2
Units
ps
ns
ns
ns
ns
ns
ps
PP
ps
RMS
75
Note 5
Noise Discriminator Bypassed
Noise Discriminator Enabled
Note 6
Note 7
Figure 1
V
ID
18mV
PP
Note 12
R
LOS/SDLVL
= 10kΩ
(8, 10, 13)
R
LOS/SDLVL
= 10kΩ
R
LOS/SDLVL
= 10kΩ
(10, 13)
(11, 13)
120
150
5
5
7
15
5
5
660
800
9
4.5
6
9.4
5
3.5
27
15
2
12.5
7
5
35
21
4.5
42
36
15.6
8.6
7
45
28
6
1800
940
mV
PP
mV
PP
mV
PP
mV
PP
dB
mV
PP
mV
PP
dB
mV
PP
mV
PP
dB
dB
dB
R
LOS/SDLVL
= 5kΩ
(10, 13)
R
LOS/SDLVL
= 5kΩ
(10, 13)
R
LOS/SDLVL
= 5kΩ
(11, 13)
R
LOS/SDLVL
= 100Ω
R
LOS/SDLVL
= 100Ω
R
LOS/SDLVL
= 100Ω
(10, 13)
(10, 13)
(11, 13)
January 2012
6
M9999-010212-C
hbwhelp@micrel.com
or (408) 955-1690
