1. This table replaces the three tables traditionally seen in ECL 100K data books. Outputs are terminated through a 50Ω resistor to –2.0V except where
otherwise specified on the individual data sheets.
2. Guaranteed HIGH Signal for all inputs.
3. Guaranteed LOW Signal for all inputs.
2
SEMICONDUCTOR
SYNERGY
SY88927V
AC ELECTRICAL CHARACTERISTICS
V
EE
= –3.0V to –5.5V; V
CC
= GND
T
A
= –40
°
C
Symbol
t
PLH
t
PHL
t
skew
V
CMR
V
ID
V
OD
t
r
t
f
Parameter
Propagation Delay to
Output
D (Diff)
D (SE)
Duty Cycle Skew
(1)
(Diff)
Min.
160
—
—
Max.
300
—
—
V
CC
1800
—
—
175
T
A
= 0
°
C
Min.
160
—
—
V
EE
+2
5
—
—
—
Max.
300
—
20
V
CC
1800
—
—
175
T
A
= +25
°
C
Min.
160
—
—
V
EE
+2
5
—
—
—
Typ.
260
—
5
—
—
600
200
105
Max.
300
—
20
V
CC
1800
—
—
175
T
A
= +85
°
C
Min.
200
—
—
V
EE
+2
5
—
—
—
Max.
360
—
20
V
CC
ps
V
Unit
ps
Conditions
Common Mode Range
(2)
V
EE
+2
Input Voltage Range
Differential Output
Voltage Swing
Output Rise/Fall Times Q
(20% to 80%)
5
—
—
—
1800 mVp-p
—
—
175
mV
mV
ps
V
ID
> 25mVp-p
V
ID
> 5mVp-p
V
ID
> 100mVp-p
V
ID
< 100mVp-p
NOTES:
1. Duty cycle skew is the difference between a t
PLH
and t
PHL
propagation delay through a device.
2. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified
range and the peak-to-peak voltage lies between V
PP
min. and 1V. The lower end of the CMR range varies 1:1 with V
嵌入式系统
