ESD9X3.3ST5G Series,
SZESD9X3.3ST5G Series
ESD Protection Diode
Micro−Packaged Diodes for ESD Protection
The ESD9X Series is designed to protect voltage sensitive
components from ESD. Excellent clamping capability, low leakage,
and fast response time provide best in class protection on designs that
are exposed to ESD. Because of its small size, it is suited for use in
cellular phones, MP3 players, digital cameras and many other portable
applications where board space is at a premium.
Specification Features:
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1
PIN 1. CATHODE
2. ANODE
SCALE 8:1
2
•
Low Clamping Voltage
•
Small Body Outline Dimensions:
•
•
•
•
•
•
•
•
0.039″ x 0.024″ (1.0 mm x 0.60 mm)
Low Body Height: 0.017″ (0.43 mm) Max
Stand−off Voltage: 3.3 V
−
12 V
Low Leakage
Response Time is Typically < 1 ns
ESD Rating of Class 3 (> 16 kV) per Human Body Model
IEC61000−4−2 Level 4 ESD Protection
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
These are Pb−Free Devices
MARKING
DIAGRAM
XM
SOD−923
CASE 514AA
X
M
= Specific Device Code
= Date Code
ORDERING INFORMATION
Device
ESD9XxxST5G
Package
SOD−923
(Pb−Free)
Shipping
†
8000/Tape & Reel
8000/Tape & Reel
Mechanical Characteristics:
CASE:
Void-free, transfer-molded, thermosetting plastic
Epoxy Meets UL 94 V−0
LEAD FINISH:
100% Matte Sn (Tin)
MOUNTING POSITION:
Any
QUALIFIED MAX REFLOW TEMPERATURE:
260°C
SZESD9XxxST5G SOD−923
(Pb−Free)
Device Meets MSL 1 Requirements
MAXIMUM RATINGS
Rating
IEC 61000−4−2 (ESD)
ESD Voltage
Contact
Air
Symbol
Value
±30
±30
16
400
⎪
P
D
T
J
, T
stg
T
L
150
−55
to
+150
260
Unit
kV
kV
V
mW
°C
°C
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
DEVICE MARKING INFORMATION
See specific marking information in the device marking
column of the table on page 2 of this data sheet.
Per Human Body Model
Per Machine Model
Total Power Dissipation on FR−5 Board
(Note 1) @ T
A
= 25°C
Junction and Storage Temperature Range
Lead Solder Temperature
−
Maximum
(10 Second Duration)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. FR−5 = 1.0 x 0.75 x 0.62 in.
See Application Note AND8308/D for further description of survivability specs.
©
Semiconductor Components Industries, LLC, 2012
October, 2017
−
Rev. 8
1
Publication Order Number:
ESD9X3.3ST5G/D
ESD9X3.3ST5G Series, SZESD9X3.3ST5G Series
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Symbol
I
PP
V
C
V
RWM
I
R
V
BR
I
T
I
F
V
F
P
pk
C
Parameter
Maximum Reverse Peak Pulse Current
Clamping Voltage @ I
PP
Working Peak Reverse Voltage
Maximum Reverse Leakage Current @ V
RWM
Breakdown Voltage @ I
T
Test Current
Forward Current
Forward Voltage @ I
F
Peak Power Dissipation
Max. Capacitance @V
R
= 0 and f = 1 MHz
I
PP
V
C
V
BR
V
RWM
I
R
V
F
I
T
V
I
F
I
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
Uni−Directional
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted, V
F
= 1.1 V Max. @ I
F
= 10 mA for all types)
V
RWM
(V)
Device*
ESD9X3.3ST5G
ESD9X5.0ST5G
ESD9X7.0ST5G
ESD9X12ST5G
Device
Marking
A
B
5**
C
Max
3.3
5.0
7.0
12
I
R
(mA)
@ V
RWM
Max
2.5
1.0
0.1
1.0
V
BR
(V)
@ I
T
(Note 2)
Min
5.0
6.2
7.5
13.5
Max I
PP
(A)
(Note 3)
V
C
(V)
@ Max I
PP
(Note 3)
Max
9.8
8.7
4.0
5.9
10.4
12.3
25
23.7
P
pk
(W)
(8 x 20
ms)
Typ
102
107
100
140
C
(pF)
Typ
80
65
65
30
Figures 1 and 2
(Note 5)
I
T
mA
1.0
1.0
1.0
1.0
V
C
Per IEC61000−4−2
(Note 4)
* Include SZ-prefix devices where applicable.
**Rotated 270 degrees.
2. V
BR
is measured with a pulse test current I
T
at an ambient temperature of 25°C.
3. Surge current waveform per Figure 5.
4. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
5. ESD9X5.0ST5G shown below. Other voltages available upon request.
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV contact per IEC 61000−4−2
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV contact per IEC 61000−4−2
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2
ESD9X3.3ST5G Series, SZESD9X3.3ST5G Series
IEC 61000−4−2 Spec.
Test
Voltage
(kV)
2
4
6
8
First Peak
Current
(A)
7.5
15
22.5
30
Current at
30 ns (A)
4
8
12
16
Current at
60 ns (A)
2
4
6
8
I @ 60 ns
10%
t
P
= 0.7 ns to 1 ns
I @ 30 ns
IEC61000−4−2 Waveform
I
peak
100%
90%
Level
1
2
3
4
Figure 3. IEC61000−4−2 Spec
Device
ESD Gun
Under
Test
Oscilloscope
50
W
Cable
50
W
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D
−
Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
100
% OF PEAK PULSE CURRENT
90
80
70
60
50
40
30
20
10
0
0
20
t
P
t
r
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
PEAK VALUE I
RSM
@ 8
ms
PULSE WIDTH (t
P
) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8
ms
HALF VALUE I
RSM
/2 @ 20
ms
40
t, TIME (ms)
60
80
Figure 5. 8 x 20
ms
Pulse Waveform
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3
ESD9X3.3ST5G Series, SZESD9X3.3ST5G Series
TYPICAL CHARACTERISTICS
BREAKDOWN VOLTAGE (VOLTS) (V
Z
@ I
Z
)
7.4
7.3
7.2
7.1
7.0
6.9
6.8
6.7
6.6
6.5
6.4
6.3
−55
+ 25
TEMPERATURE (°C)
+ 150
I
R
(nA)
20
18
16
14
12
10
8
6
4
2
0
−55
+ 25
TEMPERATURE (°C)
+ 150
Figure 6. Typical Breakdown Voltage
versus Temperature
Figure 7. Typical Leakage Current
versus Temperature
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ESD9X3.3ST5G Series, SZESD9X3.3ST5G Series
PACKAGE DIMENSIONS
SOD−923
CASE 514AA
ISSUE E
D
−X−
−Y−
E
1
2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
DIM
A
b
c
D
E
H
E
L
L2
MILLIMETERS
MIN
NOM MAX
0.34
0.39
0.43
0.15
0.20
0.25
0.07
0.12
0.17
0.75
0.80
0.85
0.55
0.60
0.65
0.95
1.00
1.05
0.19 REF
0.05
0.10
0.15
INCHES
MIN
NOM MAX
0.013 0.015 0.017
0.006 0.008 0.010
0.003 0.005 0.007
0.030 0.031 0.033
0.022 0.024 0.026
0.037 0.039 0.041
0.007 REF
0.002 0.004 0.006
b
0.08 X Y
2X
TOP VIEW
A
c
H
E
SIDE VIEW
2X
SOLDERING FOOTPRINT*
L
0.36
2X
1.20
0.25
2X
2X
L2
BOTTOM VIEW
PACKAGE
OUTLINE
DIMENSIONS: MILLIMETERS
See Application Note AND8455/D for more mounting details
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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