IRFR1N60A, IRFU1N60A, SiHFR1N60A, SiHFU1N60A
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
(Max.) (Ω)
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
14
2.7
8.1
Single
D
FEATURES
600
7.0
• Low Gate Charge Q
g
Results in Simple Drive
Requirement
• Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
Available
RoHS*
COMPLIANT
• Fully Characterized Capacitance and Avalanche Voltage
and Current
• Lead (Pb)-free Available
DPAK
(TO-252)
IPAK
(TO-251)
G
APPLICATIONS
• Switch Mode Power Supply (SMPS)
• Uninterruptible Power Supply
• Power Factor Correction
S
N-Channel
MOSFET
TYPICAL SMPS TOPOLOGIES
• Low Power Single Transistor Flyback
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
DPAK (TO-252)
IRFR1N60APbF
SiHFR1N60A-E3
IRFR1N60A
SiHFR1N60A
DPAK (TO-252)
IRFR1N60ATRLPbF
a
SiHFR1N60ATL-E3
a
-
-
DPAK (TO-252)
IRFR1N60ATRPbF
a
SiHFR1N60AT-E3
a
IRFR1N60ATR
a
SiHFR1N60AT
a
DPAK (TO-252)
IRFR1N60ATRRPbF
a
SiHFR1N60ATR-E3
a
-
-
IPAK (TO-251)
IRFU1N60APbF
SiHFU1N60A-E3
IRFU1N60A
SiHFU1N60A
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS
T
C
= 25 °C, unless otherwise noted
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
a
Linear Derating Factor
Single Pulse Avalanche Energy
b
Repetitive Avalanche Current
a
Repetitive Avalanche Energy
a
Maximum Power Dissipation
Peak Diode Recovery dV/dt
c
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
for 10 s
T
C
= 25 °C
E
AS
I
AR
E
AR
P
D
dV/dt
T
J
, T
stg
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
LIMIT
600
± 30
1.4
0.89
5.6
0.28
93
1.4
3.6
36
3.8
- 55 to + 150
300
d
W/°C
mJ
A
mJ
W
V/ns
°C
A
UNIT
V
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting T
J
= 25 °C, L = 95 mH, R
G
= 25
Ω,
I
AS
= 1.4 A (see fig. 12).
c. I
SD
≤
1.4 A, dI/dt
≤
180 A/µs, V
DD
≤
V
DS
, T
J
≤
150 °C.
d. 1.6 mm from case.
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IRFR1N60A, IRFU1N60A, SiHFR1N60A, SiHFU1N60A
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
(PCB Mount)
a
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJA
R
thJC
TYP.
-
-
-
MAX.
110
50
3.5
°C/W
UNIT
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS
T
J
= 25 °C, unless otherwise noted
PARAMETER
Static
Drain-Source Breakdown Voltage
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Effective Output Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
a
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DS
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
V
GS
= 0 V, I
D
= 250 µA
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= ± 30 V
V
DS
= 600 V, V
GS
= 0 V
V
DS
= 480 V, V
GS
= 0 V, T
J
= 150 °C
V
GS
= 10 V
I
D
= 0.84 A
b
V
DS
= 50 V, I
D
= 0.84 A
600
2.0
-
-
-
-
0.88
-
-
-
-
-
-
-
-
4.0
± 100
25
250
7.0
-
V
nA
µA
Ω
S
C
iss
C
oss
C
rss
C
oss
C
oss
eff.
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
V
DS
= 1.0 V, f = 1.0 MHz
V
GS
= 0 V
V
DS
= 480 V, f = 1.0 MHz
V
DS
= 0 V to 480 V
c
V
GS
= 10 V
I
D
= 1.4 A, V
DS
= 400 V,
see fig. 6 and 13
b
-
-
-
-
-
-
-
-
-
-
229
32.6
2.4
320
11.5
130
-
-
-
9.8
14
18
20
-
-
-
-
-
-
14
2.7
8.1
-
-
-
-
ns
nC
pF
V
DD
= 250 V, I
D
= 1.4 A,
R
G
= 2.15
Ω,
R
D
= 178
Ω,
see fig. 10
b
-
-
-
-
-
-
-
-
-
-
-
290
510
1.4
A
5.6
1.6
440
760
V
ns
µC
G
S
T
J
= 25 °C, I
S
= 1.4 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 1.4 A, dI/dt = 100 A/µs
b
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
≤
300 µs; duty cycle
≤
2 %.
c. C
oss
eff. is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 to 80 % V
DS
.
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IRFR1N60A, IRFU1N60A, SiHFR1N60A, SiHFU1N60A
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
10
I
D
, Drain-to-Source Current (A)
I
D
, Drain-to-Source Current (A)
1
T
J
= 150
°
C
1
T
J
= 25
°
C
0.1
4.5V
0.01
0.1
20μs PULSE WIDTH
T
J
= 25
°
C
1
10
100
0.1
4.0
V DS = 100V
20μs PULSE WIDTH
5.0
6.0
7.0
8.0
9.0
V
DS
, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
V
GS
, Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
10
TOP
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
, Drain-to-Source Current (A)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
3.0
I
D
= 1.4A
2.5
2.0
1
1.5
1.0
4.5V
0.5
0.1
1
10
20μs PULSE WIDTH
T
J
= 150
°
C
100
0.0
-60 -40 -20
V
GS
= 10V
0
20
40
60
80 100 120 140 160
V
DS
, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
T
J
, Junction Temperature (
°
C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFR1N60A, IRFU1N60A, SiHFR1N60A, SiHFU1N60A
10000
C, Capacitance (pF)
1000
I
SD
, Reverse Drain Current (A)
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd
, C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
10
C
iss
100
T
J
= 150
°
C
1
C
oss
10
T
J
= 25
°
C
C
rss
1
1
10
100
1000
A
0.1
0.4
V
GS
= 0 V
0.6
0.8
1.0
1.2
V
DS
, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
V
SD
,Source-to-Drain Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
20
I
D
= 1.4A
V
DS
= 480V
V
DS
= 300V
V
DS
= 120V
100
V
GS
, Gate-to-Source Voltage (V)
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
16
I
D
, Drain Current (A)
10
10us
12
8
100us
1
1ms
4
0
0
2
4
6
FOR TEST CIRCUIT
SEE FIGURE 13
8
10
12
14
0.1
T
C
= 25 ° C
T
J
= 150 ° C
Single Pulse
10
100
10ms
1000
10000
Q
G
, Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
V
DS
, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
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IRFR1N60A, IRFU1N60A, SiHFR1N60A, SiHFU1N60A
1.6
V
GS
R
G
V
DS
R
D
D.U.T.
+
-
V
DD
I
D
, Drain Current (A)
1.2
10
V
Pulse
width
≤
1
µs
Duty factor
≤
0.1
%
0.8
Fig. 10a - Switching Time Test Circuit
0.4
V
DS
90
%
0.0
25
50
75
100
125
150
T
C
, Case Temperature ( ° C)
Fig. 9 - Maximum Drain Current vs. Case Temperature
10
10
%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig. 10b - Switching Time Waveforms
Thermal Response (Z
thJC
)
D = 0.50
1
0.20
0.10
0.05
0.02
0.01
P
DM
SINGLE PULSE
(THERMAL RESPONSE)
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.0001
0.001
0.01
0.1
1
0.1
0.01
0.00001
t
1
, Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
15
V
V
DS
t
p
V
DS
L
Driver
R
G
20
V
t
p
D.U.T
I
AS
0.01
Ω
+
A
-
V
DD
I
AS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
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