tm
TE
CH
T14L1024N
SRAM
FEATURES
•
Fast Address Access Times : 10/12/15ns
•
Single 3.3V ±0.3V power supply
•
Center power/ground pin configuration
•
Low Power Consumption : 110/105/100mA
•
TTL I/O compatible
•
2.0V data retention mode
•
Automatic power-down when deselected
•
Available packages :
- 32-pin 300 mil and 400 mil SOJ
- 32-pin TSOP 8x13.4mm and 8x20mm
- 36-Ball CSP (8x10mm)
128K X 8 HIGH SPEED
CMOS STATIC RAM
GENERAL DESCRIPTION
The T14L1024N is a one-megabit density, fast
static random access memory organized as
131,072
words by 8 bits. It is designed for
use in high performance
memory applications
such as main memory storage and high speed
communication buffers. Fabricated using high
performance CMOS technology, access times
down to 10ns are achieved.
BLOCK DIAGRAM
Vcc
Vss
A0
.
..
.
A16
CE
DATA I/O
WE
OE
DECODER
PART NUMBER EXAMPLES
T14L1024N-10J
T14L1024N-10W
T14L1024N-10P
T14L1024N-10H
T14L1024N-10C
PACKAGE
SPEED
SOJ 300mil
10ns
SOJ 400 mil
10ns
10ns
TSOP 8x13.4mm
TSOP 8x20mm
10ns
36-Ball CSP
10ns
CORE
ARRAY
I/O0
.
.
.
I/O7
PIN DESCRIPTION
SYMBOL
A0 - A16
I/O0 - I/O7
CE
WE
OE
Vcc
Vss
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Inputs
Write Enable
Output Enable
Power Supply
Ground
TM Technology Inc. reserves the right
P. 1
to change products or specifications without notice.
Publication Date: APR. 2002
Revision: C
tm
A0
A1
A2
A3
CE
I/O0
I/O1
Vcc
Vss
I/O2
I/O3
WE
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
TE
CH
T14L1024N
PIN CONFIGURATION
32
31
30
29
28
27
A16
A15
A14
A13
OE
I/O7
I/O6
Vss
Vcc
I/O5
I/O4
A12
A11
A10
A9
A8
SOJ
26
25
24
23
22
21
20
19
18
17
A0
A1
A2
A3
CE
I/O0
I/O1
VCC
VSS
I/O2
I/O3
WE
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
TSOP
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A16
A15
A14
A13
OE
I/O7
I/O6
VSS
VCC
I/O5
I/O4
A12
A11
A10
A9
A8
1
2
3
4
5
6
A
B
C
D
E
F
G
H
A0
A1
NC
A3
A6
A8
I /O 4
A2
WE
A4
A7
I /O 0
I /O 5
NC
A5
I /O 1
V ss
V cc
V cc
V ss
I /O 6
NC
NC
I /O 2
I /O 7
OE
CE
A 16
A 15
I /O 3
A9
A 10
A 11
A 12
A 13
A 14
36-Ball CSP TOP VIEW (Ball Down)
TM Technology Inc. reserves the right
P. 2
to change products or specifications without notice.
Publication Date: APR. 2002
Revision: C
tm
TE
CH
T14L1024N
DC CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS
PARAMETER
Power Supply Voltage
Input Voltage
Output Voltage
Operating Temperatrue
Storage Temperature
Power Dissipation
Short Circuit Output Current
SYM
Vcc
V
IN
V
OUT
T
OPR
T
STG
P
D
I
OUT
RATING
-0.5 to 4.6
-0.5 to Vcc+0.5
-0.5 to Vcc+0.5
0 to +70
-55 to +150
1.0
50
UNIT
V
V
V
°C
°C
W
mA
TRUTH TABLE
CE
H
OE
X
WE
X
MODE
Not Selected
Not Selected
Output Disable
Read
Write
I/O0- I/O7
High-Z
High-Z
High-Z
Data Out
Data In
Vcc
X
L
L
L
X
H
L
X
X
H
H
L
I
SB,
I
SB1
I
SB,
I
SB1
Icc
Icc
Icc
OPERATING CHARACTERISTICS
(Vcc = 3.3V
±0.3V,
Ta = 0 to 70°C)
PARAMETER
Power Supply Voltage
Input Low Voltage
Input High Voltage
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
Operating Power
Supply Current
Standby Power
Supply Current
SYM.
Vcc
V
IL
V
IH
I
LI
I
LO
TEST CONDITIONS
MIN.
3.0
-0.5
2.1
-
-
-
2.4
-
-
-
-
-
MAX.
3.6
0.8
Vcc+0.3
5
5
0.4
-
110
105
100
25
5
UNIT
V
V
V
uA
uA
V
V
mA
mA
mA
mA
mA
V
IN
=Vss to Vcc
V
IN
=Vss to Vcc ,
CE
= V
IH
OE
= V
IH
or
WE
= V
IL
I
OL
= 4.0 mA
I
OH
=-2.0 mA
CE
=
V
IL
V
OL
V
OH
Icc
10ns
12ns
15ns
I
SB
I
SB1
f=max
IO = 0mA
CE
=
V
IH
, IO = 0mA
Vcc = max;
CE
≥
Vcc-0.2V; f=0mhz;
IO = 0mA
Note:
Typical characteristics are at Vcc = 3.3V, Ta = 25°C
TM Technology Inc. reserves the right
P. 3
to change products or specifications without notice.
Publication Date: APR. 2002
Revision: C
tm
TE
CH
T14L1024N
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Supply Voltage
Input Voltage, low
Input Voltage, high
Ambient Temperature
SYM
Vcc
MIN
Typ-0.3
-0.3
2.1
0
TYP
3.3
-
-
-
MAX
Typ+0.3
0.8
Vcc+0.3
70
UNIT
V
V
V
°C
V
IL
V
IH
T
A
CAPACITANCE
PARAMETER
Input Capacitance
Input/ Output Capacitance
SYMBOL
C
IN
C
I/O
CONDITION
V
IN
= 0V
V
OUT
= 0V
MAX.
6
8
UNIT
pF
pF
Note:
These parameters are sampled but not 100% tested.
AC TEST CONDITIONS
PARAMETER
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Level
Output Load
CONDITIONS
0V to 3V
3.0 ns
1.5V
C
L
=30pF,
I
OH
/
I
OL
= -2mA/4mA
AC TEST LOADS AND WAVEFORM
3.3V
RL=50 ohm
OUTPUT
Zo=50 ohm
Vt=1.5V
30pF
OUTPUT
5pF
Including
Jig and
Scope
R2
353 ohm
R1 319 ohm
(For T
CLZ
, T
OLZ
, T
CHZ
, T
OHZ
, T
WHZ
, T
OW
)
TM Technology Inc. reserves the right
P. 4
to change products or specifications without notice.
Publication Date: APR. 2002
Revision: C
tm
TE
CH
T14L1024N
AC CHARACTERISTICS
(
Vcc
=3.3V
±0.3V,
Vss = 0V, Ta = 0 to 70°C)
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable to Output Valid
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
SYM.
T14L1024N-10 T14L1024N-12
MIN. MAX. MIN. MAX.
10
-
12
-
-
-
-
3
0
-
-
3
10
10
6
-
-
5
5
-
-
-
-
3
0
-
-
3
12
12
7
-
-
6
6
-
T14L1024N-15
UNIT
MIN. MAX.
15
-
ns
-
-
-
3
0
-
-
3
15
15
7
-
-
7
7
-
ns
ns
ns
ns
ns
ns
ns
ns
t
RC
t
AA
t
ACS
t
AOE
t
CLZ*
t
OLZ*
t
CHZ*
t
OHZ*
t
OH
* These parameters are sampled but not 100% tested.
(2)WRITE CYCLE
PARAMETER
Write Cycle Time
Chip Enable to End of Write
Address Valid to End of Write
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Valid to End of Write
Data Hold from End of Write
Write to Output in High Z
Output Disable to Output in High Z
Output Active from End of Write
SYM.
T14L1024N-10 T14L1024N-12
MIN. MAX. MIN. MAX.
10
-
12
-
8
8
0
8
0
6
0
-
-
0
-
-
-
-
-
-
-
5
5
-
10
10
0
10
0
8
0
-
-
0
-
-
-
-
-
-
-
6
6
-
T14L1024N-15
UNIT
MIN. MAX.
15
-
ns
11
11
0
11
0
8
0
-
-
0
-
-
-
-
-
-
-
6
7
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
WC
t
CW
t
AW
t
AS
t
WP
t
WR
t
DW
t
DH
t
WHZ*
t
OHZ*
t
OW
* These parameters are sampled but not 100% tested.
TM Technology Inc. reserves the right
P. 5
to change products or specifications without notice.
Publication Date: APR. 2002
Revision: C
stm32/stm8
