tm
TE
CH
T15M256B
SRAM
FEATURES
•
High speed access time: 45/50/70/85/100ns
•
Low power supply current :
- Operating :37mA(max)
- Standby : 10uA
•
Power supply : 5V (± 10%)
•
Fully static operation – No clock or refreshing
required
•
All inputs and outputs directly LVTTL
compatible
•
Common I/O capability
•
Data retention voltage : 1.5V (min)
•
Available packages :
28-pin DIP(600mil),SOJ, SOP/lead-free, TSOP-I
(8x13.4mm forward type and reverse type).
•
Operating temperature :
-
-
0 ~ +70
°C
-40 ~ +85
°C
32K X 8 LOW POWER
CMOS STATIC RAM
GENERAL DESCRIPTION
The T15M256B is a low power CMOS static
RAM. organized as 32,768 x 8 bits that operates
on a single 5-volt power supply. Low operating
and standby current . Data retention is guaranteed
at a power supply voltage as low as 1.5V. This
device is packaged in a standard 28-pin
DIP(600mil), SOJ, SOP, TSOP-I forward and
reverse type.
BLOCK DIAGRAM
Vcc
→
Vss
→
A0
→
A14
→
.
.
.
DECODER
CORE
ARRAY
PART NUMBER EXAMPLES
PART NO.
T15M256B-70N
T15M256B-70J
T15M256B-70D
T15M256B-85P
T15M256B-85R
T15M256B-70DG
T15M256B-70NI
T15M256B-70JI
T15M256B-70DI
T15M256B-85PI
T15M256B-85RI
PACKAGE
CODE
N=DIP
J=SOJ
D=SOP
P= TSOP-I(Forward)
R= TSOP-I(Reverse)
D=SOP/lead-free
N=DIP
J=SOJ
D=SOP
P= TSOP-I(Forward)
R= TSOP-I(Reverse)
-40 ~ +85
°C
0 ~ +70
°C
Operating
Temperature
CS
→
OE
→
CONTROL
WE
→
←
I / O1
DATA I/O
←
I / O8
.
.
TM Technology Inc. reserves the right
to change products or specifications without notice.
P. 1
Publication Date: OCT. 2003
Revision:C
tm
A 14
A 12
A7
A6
A5
A4
A3
A2
A1
A0
I/O 1
I/O 2
I/O 3
V ss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TE
CH
T15M256B
PIN CONFIGURATION
28
27
26
25
24
V cc
WE
A 13
A8
A9
A 11
OE
A 10
CS
I/O 8
I/O 7
I/O 6
I/O 5
I/O 4
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
Vcc
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
D IP
&
SO J
23
22
21
20
19
18
17
16
15
SOP
22
21
20
19
18
17
16
15
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TSOP-I
Forward
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
A3
A4
A5
A6
A7
A12
A14
VCC
WE
A13
A8
A9
A11
OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TSOP-I
Reverse
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A2
A1
A0
I/O1
I/O2
I/O3
VSS
I/O4
I/O5
I/O6
I/O7
I/O8
CS
A10
PIN DESCRIPTION
SYMBOL
A0 - A14
I/O1 - I/O8
CS
WE
OE
Vcc
Vss
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Inputs
Write Enable
Output Enable
Power Supply
Ground
TM Technology Inc. reserves the right
to change products or specifications without notice.
P. 2
Publication Date: OCT. 2003
Revision:C
tm
TE
CH
T15M256B
DC CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS
PARAMETER
Supply Voltage to Vss Potential
Inputs to Vss Potential
Power Dissipation
Storage Temperature
RATING
-0.5 to + 7V
-0.5 to Vcc +0.5
0.7
-60 to +150
UNIT
V
V
W
°C
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Supply Voltage
Input Voltage, low
Input Voltage, high
Ambient Temperature
SYM
Vcc
MIN
4.5
-0.3
2.2
0/-40
TYP
5
-
-
-
MAX
5.5
0.8
Vcc+0.3
+70/+85
UNIT
V
V
V
°C
V
IL
V
IH
T
A
TRUTH TABLE
CS
H
L
L
L
OE
X
H
L
X
WE
X
H
H
L
MODE
Not Selected
Output Disable
Read
Write
I/O1- I/O8
High-Z
High-Z
Data Out
Data In
Power
Standby
Active
Active
Active
OPERATING CHARACTERISTICS
(Vcc = 5V /
± 10%
, Vss = 0V, Ta =
0 ~ +70
°C
/-40 to 85°C)
PARAMETER
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
SYM.
TEST CONDITIONS
Vin=Vss to Vcc
V
I/O
=Vss to Vcc ,
CS
=
V
IH
or
OE
=
I
LI
I
LO
V
OL
V
OH
MIN. TYP. MAX. UNIT
-
-
1
uA
-
-
2.4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1
0.4
-
37
35
30
25
20
0.3
10
uA
V
V
mA
mA
mA
mA
mA
mA
uA
V
IH
or
WE
=
V
IL
I
OL
= + 2.1mA
I
OH
= - 1.0mA
CS
=
V
IL
, I/O=0mA
Cycle = MIN.
Duty = 100%
-45
-50
-70
-85
-100
Operating Power
Supply Current
Icc
Standby Power
Supply Current
I
SB
I
SB1
CS
=
V
IH
, Cycle=min, Duty=100%
CS
≥
Vcc
-0.2V
TM Technology Inc. reserves the right
to change products or specifications without notice.
P. 3
Publication Date: OCT. 2003
Revision:C
tm
TE
CH
T15M256B
CAPACITANCE
(Vcc = 5V /
± 10%
, Ta = 25°C, f = 1 MHz)
PARAMETER
Input Capacitance
Input/ Output Capacitance
SYMBOL
CONDITION
V
IN
= 0V
V
OUT
= 0V
MAX.
6
8
UNIT
pF
pF
C
IN
C
I/O
Note:
These parameters are sampled but not 100% tested.
AC TEST CONDITIONS
PARAMETER
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Level
Output Load
0V to 3V
3 ns
1.5V
See Fig. 1,2
CONDITIONS
AC TEST LOADS AND WAVEFORM
5V
OUTPUT
R1 - 1928 ohm
5V
OUTPUT
R1- 1928 ohm
30pF
Including
Jig and
Scope
R2
1020 ohm
5pF
Including
Jig and
Scope
R2
1020
ohm
(For T
C L Z
, T
O LZ
, T
C H Z
, T
O H Z
, T
W H Z
, T
O W
)
Fig 1
Fig 2
TM Technology Inc. reserves the right
to change products or specifications without notice.
P. 4
Publication Date: OCT. 2003
Revision:C
tm
TE
CH
T15M256B
AC CHARACTERISTICS
(
Vcc
= 5V /
± 10%
, Vss = 0V, Ta =
0 ~ +70
°C/
-40 to 85°C)
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Selection to Output in Low Z
Output Enable to Output in Low Z
SYM.
-45ns
-50ns
-70ns
-85ns
-100ns
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
t
RC
t
AA
t
ACS
t
AOE
t
CLZ*
t
OLZ*
45
-
-
-
7
5
-
-
10
-
45
45
22
-
-
15
15
-
50
-
-
-
7
5
-
-
10
-
50
50
25
-
-
20
20
-
70
-
-
-
10
5
-
-
10
-
70
70
35
-
-
25
25
-
85
-
-
-
10
5
-
-
10
-
85
85
40
-
-
30
30
-
100
-
-
-
10
5
-
-
10
-
100
100
50
-
-
30
30
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Deselection to Output in High
t
CHZ*
Z
Output Disable to Output in High Z
t
OHZ*
Output Hold from Address Change
t
OH
* These parameters is measured with 5pF test load.
(2)WRITE CYCLE
PARAMETER
Write Cycle Time
Chip Selection to End of Write
Address Valid to End of Write
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Valid to End of Write
Data Hold from End of Write
Write to Output in High Z
Output Active from End of Write
SYM.
-45ns
-50ns
-70ns
-85ns
-100ns
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
t
WC
t
CW
t
AW
t
AS
t
WP
t
WR
t
DW
t
DH
t
WHZ*
t
OW
45
35
35
0
25
0
22
0
-
5
-
-
-
-
-
-
-
-
15
-
50
40
40
0
30
0
25
0
-
5
-
-
-
-
-
-
-
-
20
-
70
60
60
0
50
0
30
0
-
5
-
-
-
-
-
-
-
-
25
-
85
70
70
0
60
0
35
0
-
5
-
-
-
-
-
-
-
-
30
-
100
80
80
0
70
0
40
0
-
5
-
-
-
-
-
-
-
-
30
-
* These parameters is measured with 30pF test load.
TM Technology Inc. reserves the right
to change products or specifications without notice.
P. 5
Publication Date: OCT. 2003
Revision:C
