TC1303A/TC1303B/
TC1303C/TC1304
500 mA Synchronous Buck Regulator,
+ 300 mA LDO with Power-Good Output
Features
• Dual-Output Regulator (500 mA Buck Regulator
and 300 mA Low-Dropout Regulator)
• Power-Good Output with 300 ms Delay
• Total Device Quiescent Current = 65 µA, Typ.
• Independent Shutdown for Buck and LDO
Outputs (TC1303)
• Both Outputs Internally Compensated
• Synchronous Buck Regulator:
- Over 90% Typical Efficiency
- 2.0 MHz Fixed-Frequency PWM
(Heavy Load)
- Low Output Noise
- Automatic PWM to PFM mode transition
- Adjustable (0.8V to 4.5V) and Standard
Fixed-Output Voltages (0.8V, 1.2V, 1.5V,
1.8V, 2.5V, 3.3V)
• Low-Dropout Regulator:
- Low-Dropout Voltage = 137 mV Typ. @
200 mA
- Standard Fixed-Output Voltages
(1.5V, 1.8V, 2.5V, 3.3V)
• Power-Good Function:
- Monitors Buck Output Function (TC1303A)
- Monitors LDO Output Function (TC1303B)
- Monitors Both Buck and LDO Output Func-
tions (TC1303C
and TC1304)
- 300 ms Delay Used for Processor Reset
• Sequenced Startup and Shutdown (TC1304)
• Small 10-pin 3X3 DFN or MSOP Package
Options
• Operating Junction Temperature Range:
- -40°C to +125°C
• Undervoltage Lockout (UVLO)
• Output Short Circuit Protection
• Overtemperature Protection
Description
The TC1303/TC1304 combines a 500 mA synchro-
nous buck regulator and 300 mA Low-Dropout Regula-
tor (LDO) with a power-good monitor to provide a highly
integrated solution for devices that require multiple
supply voltages. The unique combination of an
integrated buck switching regulator and low-dropout
linear regulator provides the lowest system cost for
dual-output voltage applications that require one lower
processor core voltage and one higher bias voltage.
The 500 mA synchronous buck regulator switches at a
fixed frequency of 2.0 MHz when the load is heavy,
providing a low noise, small-size solution. When the
load on the buck output is reduced to light levels, it
changes operation to a Pulse Frequency Modulation
(PFM) mode to minimize quiescent current draw from
the battery. No intervention is necessary for smooth
transition from one mode to another.
The LDO provides a 300 mA auxiliary output that
requires a single 1 µF ceramic output capacitor,
minimizing board area and cost. The typical dropout
voltage for the LDO output is 137 mV for a 200 mA
load.
For the TC1303/TC1304, the power-good output is
based on the regulation of the buck regulator output, the
LDO output or the combination of both. The TC1304
features start-up and shutdown output sequencing.
The TC1303/TC1304 is available in either the 10-pin
DFN or MSOP package.
Additional protection features include: UVLO,
overtemperature and overcurrent protection on both
outputs.
For a complete listing of TC1303/TC1304 standard
parts, consult your Microchip representative.
Applications
•
•
•
•
•
Cellular Phones
Portable Computers
USB-Powered Devices
Handheld Medical Instruments
Organizers and PDAs
©
2005 Microchip Technology Inc.
DS21949B-page 1
TC1303A/TC1303B/TC1303C/TC1304
Package Types
TC1303A,B,C
10-Lead DFN
SHDN2 1
V
IN2
2
V
OUT2
3
PG 4
A
GND
5
10 P
GND
9 L
X
8 V
IN1
7 SHDN1
6 V
FB1
/V
OUT1
SHDN2 1
V
IN2
2
V
OUT2
3
PG 4
A
GND
5
10-Lead MSOP
10 P
GND
9 L
X
8
V
IN1
7 SHDN1
6 V
FB1
/V
OUT1
TC1304
10-Lead DFN
SHDN 1
V
IN2
2
V
OUT2
3
PG 4
A
GND
5
10 P
GND
9 L
X
8 V
IN1
7 A
GND
6 V
FB1
/V
OUT1
SHDN 1
V
IN2
2
V
OUT2
3
PG 4
A
GND
5
10-Lead MSOP
10 P
GND
9 L
X
8
V
IN1
7 A
GND
6 V
FB1
/V
OUT1
DS21949B-page 2
©
2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
Functional Block Diagram – TC1303
V
REF
Undervoltage Lockout
(UVLO)
UVLO
Synchronous Buck Regulator
V
IN1
V
IN2
PDRV
L
X
SHDN1
Control
Driver
NDRV
P
GND
P
GND
V
OUT1
/V
FB1
P
GND
A
GND
Sense Switcher for A,C
PG
TC1303A
(1)
,B
(2)
,C
(1)
options
PG Generator with Delay
V
REF
Sense LDO for B,C
UVLO
V
OUT2
LDO
SHDN2
A
GND
Note 1:
PG open-drain for A,C options
2:
PG push-pull output for B option
©
2005 Microchip Technology Inc.
DS21949B-page 3
TC1303A/TC1303B/TC1303C/TC1304
Functional Block Diagram – TC1304
V
REF
Undervoltage Lockout
(UVLO)
UVLO
Synchronous Buck Regulator
V
IN1
V
IN2
PDRV
L
X
SHDN
Control
Driver
NDRV
P
GND
P
GND
V
OUT1
/V
FB1
P
GND
A
GND
PG
TC1304
(Note)
PG Generator with Delay
Output Voltage
Sequencer ckt.
A
GND
V
REF
UVLO
V
OUT2
LDO
A
GND
Note:
PG open-drain for TC1304
DS21949B-page 4
©
2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
Typical Application Circuits
TC1303A
Fixed-Output Application
10-Lead MSOP
V
IN
2.7V to 4.2V
4.7 µF
4.7 µH
8
2
7
1
R
PULLUP
Processor
RESET
4
V
IN1
V
IN2
SHDN1
SHDN2
PG
L
X
9
4.7 µF
P
GND
10
V
OUT1
V
OUT2
A
GND
6
3
5
1 µF
V
OUT2
2.5V @ 300 mA
V
OUT1
1.5V @ 500 mA
TC1303B
Adjustable-Output Application
10-Lead DFN
Input
Voltage
4.5V to 5.5V
*Optional
Capacitor
V
IN2
1.0 µF
4.7 µH
8
4.7 µF
2
7
1
4
Processor
RESET
V
IN1
V
IN2
SHDN1
SHDN2
PG
L
X
9
4.7 µF
200 k
Ω
V
OUT2
1 µF
3.3V @
300 mA
4.99 k
Ω
33 pF
121 k
Ω
P
GND
10
V
OUT1
6
V
OUT2
A
GND
3
5
(Note)
V
OUT1
2.1V @
500 mA
Note:
Connect DFN package exposed pad to A
GND
.
TC1304
Fixed-Output Application
10-Lead MSOP
V
IN
2.7V to 4.2V
4.7 µF
4.7 µH
8
2
7
1
R
PULLUP
Processor
RESET
4
V
IN1
V
IN2
A
GND
SHDN
PG
L
X
9
4.7 µF
P
GND
10
V
OUT1
V
OUT2
A
GND
6
3
5
1 µF
V
OUT2
2.5V @ 300 mA
V
OUT1
1.2V @ 500 mA
©
2005 Microchip Technology Inc.
DS21949B-page 5
