TC9318AFAG/AFBG
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC9318AFAG,TC9318AFBG
Single Chip DTS Microcontroller (DTS-21)
The TC9318AFAG and TC9318AFBG are a 4 bit CMOS
microcontroller for signal chip digital tuning systems. It is
capable of functioning at a low voltage of 3 V and features a
built-in prescaler of operating 230 MHz, PLL and LCD drivers.
The CPU has 4 bit parallel addition and subtraction
instructions (e.g., AI, SI), logic operation instructions (e.g., OR,
AN), composite judging and compare instructions (e.g., TM, SL),
and time-base functions.
The package is an pin 64, 0.5/0.65-mm-pitch quad flat pack
package. In addition to various input/output ports and a
dedicated key-input port, which are controlled by powerful
input/output instructions (IN 1, 2, OUT 1, 2), there are many
dedicated LCD pins, a buzzer port, a 6 bit A/D converter, an IF
counter, and other pins.
Low-voltage and low-current consumption make this
microcontroller suitable for portable DTS equipment.
TC9318AFAG
TC9318AFBG
Features
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4 bit microcontroller for digital tuning systems.
Operating voltage V
DD
= 1.8~3.6 V, with low current
consumption because of CMOS circuitry (with only CPU
operating, when V
DD
= 3 V, I
DD
= 80 µA max)
Built-in prescaler (1/2 fixed divider +2 modulus prescaler:
fmax
≥
230 MHz)
Data memory (RAM) and ports are easily backed up.
Program memory (ROM): 16 bit × 4096 steps
Data memory (RAM): 4 bit × 256 words
60-instruction set (all one-word instructions)
Instruction execution time: 40 µs (with 75 kHz crystal) (MVGS, DAL instructions: 80 µs)
Many addition and subtraction instructions (12 types addition, 12 types subtraction)
Powerful composite judging instructions (TMTR, TMFR, TMT, TMF, TMTN, TMFN)
Data can be transmitted between addresses on the same row. (MVSR instruction)
Register indirect transfer available (MVGD, MVGS instruction).
16 powerful general registers (located in RAM)
Stack levels: 2
JUMP or CAL instruction can be used anywhere in the 4096 steps of program memory (ROM) as there are no
pages or fields.
16 bit of any address in the 1024 steps in program memory (ROM) can be referenced (DAL instruction).
Features independent frequency input pins (FM
IN
and AM
IN
) and two (DO1 and DO2) phase comparison
outputs for FM/VHF and AM.
Seven reference frequencies can be selected by program.
Powerful input/output instructions (IN 1, 2, OUT 1, 2)
Dedicated input ports (K
0
~K
3
) for key input. 26 LCD drive pins (69 segments maximum) available.
17 I/O ports: 10 with input/output programmable in 1 bit units, and 7 output-only port. The 2 IF
IN
, and DO1
pins can be switched by instruction to IN (input-only) or OT (output-only).
Three back-up modes available by instruction: Only CPU operation, crystal oscillation only, clock stop.
Weight
P-LQFP64-1010-0.50E: 0.32 g (typ.)
P-LQFP64-1212-0.65A: 0.45 g (typ.)
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Features built-in 1/3-duty, 1/2-bias LCD drivers and a built-in 3 V booster circuit for the display.
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TC9318AFAG/AFBG
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Features a built-in 2 Hz timer F/F and a built-in 10/100 Hz interval pulse output (internal port for time base).
Allows PLL lock status detection.
8 of the LCD segment outputs (S
16
~S
23
) can also operate as key return timing outputs (KR
0
~KR
7
). The I/O
ports are not dedicated key return timing outputs but can have other uses as well.
Built-in 20 bit, general-purpose IF counter can detect stations during auto-tuning by counting the intermediate
frequencies of each band.
Built-in 8 bit buzzer output circuit can produce 254 different tone signals.
Features a built-in 2-channel, 6 bit A/D converter.
To prevent CPU malfunctions, a built-in supply voltage drop detection circuit shuts down the CPU when voltage
falls below 1.5 V.
Pin Assignment
(top view)
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TC9318AFAG/AFBG
Block Diagram
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TC9318AFAG/AFBG
Explanation of Function
Pin No.
1
Symbol
COM1
Pin Name
Function and Operation
Output common signals to the LCD panel.
Through a matrix with pins S
1
~S
23
, a maximum of
69 segments can be displayed.
LCD common output Three levels, V
LCD
, V
EE
, and GND, are output at
83 Hz every 2 ms.
V
EE
is output after SYSTEM RESET and CLOCK
STOP are released, and a common signal is
output after the DISP OFF bit is set to “0”.
Segment signal output pins for the LCD panel.
LCD segment output Together with COM1, COM2, and COM3, a matrix
is formed that can display a maximum of 69
segments.
LCD segment
output/Key return
timing output
The signals for the key matrix and the segment
signals from pins S
16
/KR
7
~S
23
/KR
0
are output on
a time division basis. 4
×
8
=
32 key matrix can be
created in conjunction with key input ports K
0
~K
3
.
Remarks
2
COM2
3
COM3
4~18
S
1
~S
15
19~26
S
16
/KR
7
~
S
23
/KR
0
4 bit input ports for key matrix input.
Combined in a matrix with key return timing
outputs of the LCD segment pins, data from a
maximum of 4
×
8
=
32 keys can be input and pins
are pulled up. On the key seteutining output pins,
data from 4
×
6
=
24 keys can be input and pins
are pulled down. The WAIT mode is released
when high level is applied to key input ports set to
pull-down.
27~30
K
0
~K
3
Key input ports
31~36
T
0
~T
5
Key return timing
output port
These ports output the timing signal for key
matrix. To form the key matrix, load resistance
has been built-in the N-channel side. When the
key matrix combined with push-key, that does not
need a key matrix diode.
The input and output of these 4 bit I/O ports can
be programmed in 1 bit units.
37~40
P1-0~P1-3
I/O port 1
By altering the input to I/O ports set to input, the
CLOCK STOP and WAIT modes can be released,
and the MUTE bit of the MUTE pin can be set to
“1”.
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TC9318AFAG/AFBG
Pin No.
Symbol
Pin Name
Function and Operation
4 bit I/O ports.
Input and output may be programmed in 1 bit
units.
Pins P2-1 through P2-2 can also be used for
analog input to the built-in 6 bit, 2-channel A/D
converter.
Conversion time of the built-in A/D converter using
the successive comparison method is 280
µs.
The
necessary pin can be programmed to AD analog
input in 1 bit units, and P2-3 can be set to the
reference voltage input. Internal power supply
(V
DD
) or constant voltage (V
EE
) can be used as
the reference voltage. In addition, constant
voltage (V
EE
) can be input to the AD analog input
so battery voltage, etc., can be easily detected.
The reference voltage input, for which a built-in
operational amp is used, has high impedance.
The A/D converter, and their control are all
executed by program.
2 bit I/O ports, whose input/output can be
programmed in 1 bit units.
P3-0
P3-1/BUZR
I/O port 3
/Buzzer output
The P3-1 pin also functions as the output for the
built-in buzzer circuit. The buzzer sound can be
output in 254 different tones between 18.75 kHz
and 147 Hz, and at a duty of 50%.
The buzzer output, and all associated controls can
be programmed.
1 bit output port. Normally, this port is used for
muting control signal output.
47
MUTE
Muting output port
This pin can set the internal MUTE bit to “1”
according to a change in the input of I/O port 1.
MUTE bit output logic can be changed; PLL phase
difference can also be output using this pin.
Remarks
P2-0
P2-1/AD
IN1
41~44
P2-2/AD
IN2
P2-3/
DC-REF
I/O port 2
/AD analog voltage
input
/AD analog voltage
input
/Reference voltage
input
45~46
48
TEST
TEST mode control
input
Input pin used for controlling TEST mode. High
level indicates TEST mode, while low level
indicates normal operation. The pin is normally
used at low level or no-connection (NC). (a
pull-down resistor is built-in).
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