TD7624AFN
TENTATIVE
TOSHIBA BIPOLAR DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TD7624AFN
3-WIRE AND I C BUS SYSTEM, 1.3 GHz DIRECT TWO MODULUS-TYPE FREQUENCY
SYNTHESIZER FOR TV AND CATV
The TD7624AFN can be combined with a micro CPU to create a
highly functional frequency synthesizer. The control data
conforms to 3-wire bus and standard I
2
C bus formats. BUS-SW
can be used to easily switch for easy tuner system set-up.
2
FEATURES
=
Direct two modulus-type frequency synthesizer
=
3-wire bus format control
=
18-bit and 19-bit automatic discrimination circuit
(when 3-wire bus selected)
=
4-bit bandswitch drive transistor
=
5-level A / D converter (when I
2
C bus selected)
=
Frequency Step : 31.25 kHz, 50 kHz and 62.5kHz (at 4 MHz
X’tal used)
=
Phase lock detector
=
Four address settings via address selector (when I
2
C bus selected)
=
Power on reset circuit
=
Flat, compact package : SSOP16 (0.65 mm pitch)
=
Power on reset operation condition
Bandswitch register 1 to 4
: OFF
Tuning amplifier
: ON
Tuning voltage output (Vt)
: Low level
Charge-pump output current
: ±60 µA
Phase comparator reference frequency divider ratio
Note:
Weight: 0.07 g (Typ.)
=
Standard I
2
C bus format control with built-in read mode
: 1 / 64
These devices are easy to be damaged by high static voltage or electric fields.
In regards to this, please handle with care.
000707EBA1
·
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the
buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and
to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or
damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the
most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling
Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
·
The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy
control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document
shall be made at the customer’s own risk.
·
The products described in this document are subject to the foreign exchange and foreign trade laws.
·
The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its
use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or
others.
·
The information contained herein is subject to change without notice.
2001-03-01
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TD7624AFN
BLOCK DIAGRAM
MAXIMUM RATINGS
(Ta = 25°C)
CHARACTERISTIC
Supply Voltage 1
Supply Voltage 2
Power Consumption
Operating Temperature
Storage Temperature
SYMBOL
V
CC1
V
CC2
P
D
T
opr
T
stg
RATING
6.0
12
560
−20~85
−55~150
UNIT
V
V
mW
°C
°C
Note 1: When using the device at above Ta = 25°C, decrease the power dissipation by
4.5 mW for each increase of 1°C.
Note 2: These devices are easy to be damaged by high static voltage or electric fields.
In regards to this, please handle with care.
RECOMMENDED SUPPLY VOLTAGE
PIN
No.
3
4
PIN NAME
V
CC1
: PLL Power Supply
V
CC2
: Band Switch Power Supply
MIN
4.5
V
CC1
TYP.
5.0
―
MAX
5.5
9.9
UNIT
V
V
2001-03-01
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TD7624AFN
PIN INTERFACE
2001-03-01
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TD7624AFN
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, V
CC1
= 5 V, V
CC2
= 9 V, Ta = 25°C)
CHARACTERISTIC
Supply Voltage 1
Supply Current 1
Supply Voltage 2
SYMBOL
V
CC1
I
CC1
V
CC2
I
CC2
-1
Supply Current 2
I
CC2
-2
Bandswitch Drive Current
Bandswitch Drive Maximum LOAD
Bandswitch Drive Voltage Drop
X’tal Operating Range
X’tal Negative Resistance
X’tal External Input Level
Ratio Setting Range
I
BD
I
BDMAX
V
BD
Sat
OSCf
in
OSC
R
OSC
in
N14
N13
V
in1
V
in2
V
LkL
V
LkH
V
BsL
V
BsH
I
BsL
I
BsH
V
BIL
V
BIH
3
3
3
―
1
―
―
1
TEST
CIR-
CUIT
―
1
―
TEST CONDITION
―
Bandswitch : OFF
V
t
: OFF
―
Bandswitch : 1 Band ON
I
BD
= 30 mA (LOAD)
Bandswitch : 2 Band ON
I
BD
= 40 mA (TOTAL LOAD)
Maximum Drive Current / 1 port
Maximum Total Drive Current
I
BD
= 30 mA
―
―
3.2 MHz~4.5 MHz, Rx = 91 kΩ
15-bit counter
14-bit counter
f = 80~150 MHz
f = 150~1300 MHz
(lock mode, 3-wire bus mode)
(unlock mode, 3-wire bus
mode)
Pins 13 to 15
Pins 13 to 15
Pins 13 to 15
Pins 13 to 15
―
―
MIN
4.5
13
V
CC1
―
―
―
―
―
3.2
1.0
250
1024
1024
−25
−30
―
4.6
−0.3
3.0
−20
−10
0.0
4.2
TYP.
5.0
16
―
35
50
―
―
0.2
―
1.5
―
―
―
―
―
―
―
―
―
―
―
―
―
MAX
5.5
21
9.9
39
mA
58
30
50
0.4
4.5
―
1000
32767
16384
+5
+5
0.4
―
1.5
V
CC1
+0.3
10
20
0.8
V
CC1
mA
mA
V
MHz
kΩ
mV
p-p
Ratio
UNIT
V
mA
V
Prescaler Input Sensitivity
Lock Output Low Voltage
Lock Output High Voltage
Logic Input Low Voltage
Logic Input High Voltage
Logic Input Current (low)
Logic Input Current (high)
BUS-SW Low Input Voltage
BUS-SW High Input Voltage
2
1
1
1
1
1
1
1
1
dBmW
V
V
V
V
µA
V
2001-03-01
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TD7624AFN
CHARACTERISTIC
BUS-SW Low Current (low)
BUS-SW Low Current (high)
Charge Pump Output Current
ACK Output Voltage
A / D Converter Input Voltage
Set-up Time
Enable Hold Time
Next Enable Stop Time
Next Clock Stop Time
Clock Width
Enable Set-up Time
Data Hold Time
SCL Clock Frequency
Bus Free Time Between a STOP and
START Condition
Hold Time (Repeated) START
Condition
Low Period of the SCL Clock
High Period of the SCL Clock
Set-up Time for a Repeated START
Condition
Data Hold Time
Data Set-up Time
Rise Time of both SDA and SCL
Signals
Fall Time of both SDA and SCL
Signals
Set-up Time for STOP Condition
SYMBOL
I
BIL
I
BIH
I
chg
V
ACK
V
ADC
T
s
T
sL
T
NE
T
NC
T
c
T
L
T
H
f
SCL
t
BUF
t
HD;STA
t
LOW
t
HIGH
t
SU;STA
t
HD;DAT
t
SU;DAT
t
R
t
F
t
SU;STO
(I C bus mode)
Refer to data timing chart
2
TEST
CIR-
CUIT
1
1
2
1
―
TEST CONDITION
―
―
CP = [0]
CP = [1]
I
SINK
= 3 mA (I C-bus mode)
―
2
MIN.
−200
―
±50
±230
―
0.0
2
2
6
TYP.
―
―
±60
±280
―
―
―
―
―
―
―
―
―
―
―
―
―
―
―
―
―
―
―
―
MAX.
―
200
±90
±420
0.4
V
CC1
―
―
―
―
―
―
―
100
―
―
―
―
―
―
―
1000
300
―
UNIT
µA
µA
V
V
(3-wire bus mode)
Refer to data timing chart
6
2
10
2
0
4.7
µs
kHz
―
4.0
4.7
4.0
4.7
0
250
―
―
4.0
µs
ns
µs
2001-03-01
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