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TDA3601Q

multiple output voltage regulators

器件类别:模拟混合信号IC    信号电路   

厂商名称:NXP(恩智浦)

厂商官网:https://www.nxp.com

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器件参数
参数名称
属性值
厂商名称
NXP(恩智浦)
包装说明
,
Reach Compliance Code
unknow
模拟集成电路 - 其他类型
ANALOG CIRCUIT
JESD-30 代码
R-PZFM-T13
端子数量
13
封装主体材料
PLASTIC/EPOXY
封装形状
RECTANGULAR
封装形式
FLANGE MOUNT
认证状态
Not Qualified
最大供电电流 (Isup)
1.4 mA
最大供电电压 (Vsup)
18 V
最小供电电压 (Vsup)
11 V
标称供电电压 (Vsup)
13.2 V
表面贴装
NO
端子形式
THROUGH-HOLE
端子位置
ZIG-ZAG
文档预览
INTEGRATED CIRCUITS
DATA SHEET
TDA3601Q
TDA3601AQ
Multiple output voltage regulators
Product specification
Supersedes data of September 1994
File under Integrated Circuits, IC01
1995 Dec 13
Philips Semiconductors
Product specification
Multiple output voltage regulators
FEATURES
Six fixed voltage regulators
Three microprocessor-controlled regulators
Two V
P
-state controlled regulators
One fixed voltage regulator (can operate during load
dump or thermal shutdown)
V
P1
supply pin (low current pin)
V
P2
supply pin (high current pin)
RESET output (TDA3601Q) or RESET output
(TDA3601AQ)
Internally fixed timer of 100
µs
Externally fixed delay timer
High ripple rejection
Flexible leads.
QUICK REFERENCE DATA
SYMBOL
Entire device
V
P1
V
P2
supply voltage range
supply voltage range
operating
load dump; notes 1 and 2
operating
non-operating
load dump; note 1
I1
tot
T
c
V
R1
V
R2
V
R3
V
R4
V
R5
V
R6
Notes
1. Load dump, during 50 ms, t
r
>
2.5 ms.
2. Regulator 1 operating, 0.5 mA
I
R1
20 mA.
3. V
P1
= 13.2 V; V
P2
= R4-sel = R5-sel = 0; I
R1
= 0.
total quiescent current, V
P1
crystal temperature
0.5 mA
I
R1
20 mA
5 mA
I
R2
200 mA
5 mA
I
R3
150 mA
5 mA
I
R4
150 mA
5 mA
I
R5
200 mA
5 mA
I
R6
200 mA
V
P2
= 0; note 3
11
11
PARAMETER
CONDITIONS
MIN.
PROTECTION
TDA3601Q
TDA3601AQ
Current limit protection for regulator 1
Foldback current limit protection (regulators 2 to 6)
Load dump protection
Thermal protection
Regulator outputs DC short-circuit-safe to ground,
V
P
and other regulator outputs
Capable of handling high energy on any of the
output pins
Reverse polarity safe.
TYP.
MAX.
UNIT
13.2
13.2
1
18
50
18
30
50
1.4
150
V
V
V
V
V
mA
°C
Voltage regulators
output voltage regulator 1
output voltage regulator 2
output voltage regulator 3
output voltage regulator 4
output voltage regulator 5
output voltage regulator 6
4.75
1.9
4.75
9
9
9.3
5
2.1
5
9.5
9.5
9.75
5.25
2.3
5.25
10
10
10.2
V
V
V
V
V
V
1995 Dec 13
2
handbook, full pagewidth
1995 Dec 13
V
P1
VP2
5
11
VP2
SENSE
OVER VOLTAGE
AND THERMAL
SHUTDOWN
REGULATOR 1
5V
4
regulator 1
output
OUT OF
REGULATION
AND
REGULATOR 3
5V
9
regulator 3
output
REGULATOR 2
2.1 V
10
regulator 2
output
POWER ON
RESET - output
13A
INVERT
BLOCK DIAGRAM
Philips Semiconductors
Multiple output voltage regulators
TDA3601Q
TDA3601AQ
RESET - output
13
OR GATE
3
reset timing
capacitor
regulator 5
select
regulator 4
select
1
ONE SHOT
40 ms
2
3
REGULATOR 4
9.5 V
6
regulator 4
output
REGULATOR 5
9.5 V
7
regulator 5
output
ONE SHOT
100 µs
LOGIC
SWITCH
REGULATOR 6
9.75 V
8
regulator 6
output
12
MCD341
TDA3601Q
TDA3601AQ
Product specification
ground
Fig.1 Block diagram.
Philips Semiconductors
Product specification
Multiple output voltage regulators
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
TDA3601Q
TDA3601AQ
DBS13P
DESCRIPTION
TDA3601Q
TDA3601AQ
VERSION
SOT141-6
plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm)
GENERAL DESCRIPTION
The circuit contains five fixed voltage regulators with
foldback current protection and one fixed voltage regulator
(REGULATOR 1) that also operates during a load dump.
In addition, a RESET function (TDA3601Q) or RESET
function (TDA3601AQ), timer functions and a logic
multiplexer are implemented.
PINNING
SYMBOL
C
RESET
R5-sel
R4-sel
REG1
V
P1
REG4
REG5
REG6
REG3
REG2
V
P2
GND
RES
RES
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
13A
DESCRIPTION
reset timing capacitor
regulator 5 select
regulator 4 select
regulator 1 output (5 V)
supply voltage
regulator 4 output (9.5 V)
regulator 5 output (9.5 V)
regulator 6 output (9.75 V)
regulator 3 output (5 V)
regulator 2 output (2.4 V)
supply voltage
ground
RESET output (TDA3601Q)
RESET output (TDA3601AQ)
Fig.2 Pin configuration.
handbook, halfpage
C RESET
R5 - sel
R4 - sel
REG1
V
P1
REG4
REG5
REG6
REG3
1
2
3
4
5
6
7
8
9
TDA3601Q
TDA3601AQ
REG2 10
VP2 11
GND 12
RES or RES 13
MCD340 - 1
1995 Dec 13
4
Philips Semiconductors
Product specification
Multiple output voltage regulators
FUNCTIONAL DESCRIPTION
The TDA3601Q is a multiple output voltage regulator with
six fixed voltage regulators. Three, logical switch
controlled, voltage regulators (numbers 4 to 6) are
available, and one non-switchable voltage regulator
(number 1). In addition, there are two further regulators
(numbers 2 and 3), which are controlled by supply
voltages V
P1
and V
P2
(Schmitt trigger).
Regulator 1 is not affected by load dump or thermal
shutdown. Regulators 2 to 6 are supplied by V
P2
; they can
therefore be switched of by an ignition switch, for example.
An internal bandgap voltage reference, which provides a
reference voltage for each independent regulator, is
supplied by V
P1
. This supply voltage V
P1
also supplies
regulator 1.
A V
P2
sense circuit outputs a logical high when the V
P2
voltage rises through V
thr
, which remains high until the V
P2
voltage falls through V
thf
.
The supply voltage V
P1
is sensed by an out-of-regulation
Schmitt trigger.
TDA3601Q
TDA3601AQ
When this voltage drops below 5.95 V typical, the reset
output is disabled, to prevent a microprocessor being
disturbed by a too-low supply voltage. An out-of-regulation
condition is indicated by a logical low and an in-regulation
condition indicated by a logical high.
The ‘Power On’ switch low will disable regulator 2 and 3
outputs. In addition, the logic switch will be disabled, so
that regulators 4 to 6 are switched off. When both
V
P2
-sense and out-of-regulation are high, the ‘Power On’
will be high, so that the logic multiplexer and regulators 2
and 3 are enabled. Regulators 4 to 6 can now be selected
by the multiplexer.
Re-triggerable one-shot circuits produce a RESET (open
collector output) when V
P1
is available (40 ms delay
signal), or when both V
P1
and V
P2
are available (100
µs
pulse). RESET will be held in a constant high state when
the supply voltage V
P1
is less than 5.5 V (5.95 V typical).
The TDA3601 has a RESET output, but the TDA3601A
has an inverted RESET output (RESET).
LIMITING VALUES
In accordance with the Absolute maximum System (IEC 134).
SYMBOL
V
P1
, V
P2
PARAMETER
supply voltage
operating
non-operating
CONDITIONS
MIN.
MAX.
18
30
50
15
150
150
6
UNIT
V
V
V
W
°C
°C
V
load dump protected; during 50 ms;
t
r
>
2.5 ms; note 1
P
tot
T
stg
T
vj
V
pr
Note
1. Regulator 1 operating, 0.5 mA
I
R1
20 mA.
THERMAL CHARACTERISTICS
SYMBOL
R
th j-c
R
th j-amb
PARAMETER
thermal resistance from junction to case
thermal resistance from junction to ambient in free air
total power dissipation
storage temperature range
virtual junction temperature
reverse polarity
T
case
<
30
°C
non-operating
operating
non-operating
−55
−40
VALUE
8
40
UNIT
K/W
K/W
QUALITY SPECIFICATION
Quality according to UZW-BO/FQ-0601.
1995 Dec 13
5
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参数对比
与TDA3601Q相近的元器件有:TDA3601AQ。描述及对比如下:
型号 TDA3601Q TDA3601AQ
描述 multiple output voltage regulators multiple output voltage regulators
厂商名称 NXP(恩智浦) NXP(恩智浦)
Reach Compliance Code unknow unknow
模拟集成电路 - 其他类型 ANALOG CIRCUIT ANALOG CIRCUIT
JESD-30 代码 R-PZFM-T13 R-PZFM-T13
端子数量 13 13
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY
封装形状 RECTANGULAR RECTANGULAR
封装形式 FLANGE MOUNT FLANGE MOUNT
认证状态 Not Qualified Not Qualified
最大供电电流 (Isup) 1.4 mA 1.4 mA
最大供电电压 (Vsup) 18 V 18 V
最小供电电压 (Vsup) 11 V 11 V
标称供电电压 (Vsup) 13.2 V 13.2 V
表面贴装 NO NO
端子形式 THROUGH-HOLE THROUGH-HOLE
端子位置 ZIG-ZAG ZIG-ZAG
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