Numonyx™ Embedded Flash Memory (J3 65
nm) Single Bit per Cell (SBC)
32, 64, and 128 Mbit
Datasheet
Product Features
Architecture
— Symmetrical 128-KB blocks
— 128 Mbit (128 blocks)
— 64 Mbit (64 blocks)
— 32 Mbit (32 blocks)
Performance
— 75 ns Initial Access Speed
— 25 ns 8-word Asynchronous page-mode
reads
— 256-Word write buffer for x16 mode, 256-
Byte write buffer for x8 mode;
4 µs per Byte Effective programming time
System Voltage
— V
CC
= 2.7 V to 3.6 V
— V
CCQ
= 2.7 V to 3.6 V
Packaging
— 56-Lead TSOP
— 64-Ball Numonyx
™
Easy BGA package
Security
— Enhanced security options for code
protection
— 128-bit Protection Register:
64 unique device identification bits
64 user-programmable OTP bits
— Absolute protection with V
PEN
= Vss
— Individual block locking
— Block erase/program lockout during power
transitions
Software
— Program and erase suspend support
— Flash Data Integrator (FDI), Common Flash
Interface (CFI) Compatible
— Scalable Command Set
Quality and Reliability
— Operating temperature:
-40 °C to +85 °C
— 100K Minimum erase cycles per block
— 65 nm ETOX™ X Flash Technology
208032-01
May 2009
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR
OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND
CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A
PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx
products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.
Legal Lines and Disclaimers
Numonyx B.V. may make changes to specifications and product descriptions at any time, without notice.
Numonyx B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented
subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or
otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by visiting the
Numonyx website at
http://www.numonyx.com.
Numonyx, the Numonyx logo, and StrataFlash are trademarks or registered trademarks of Numonyx B.V. or its subsidiaries in other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2009, Numonyx B.V., All Rights Reserved.
Datasheet
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May 2009
208032-01
Numonyx™ Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)
Contents
1.0
Introduction
.............................................................................................................. 6
1.1
Nomenclature ..................................................................................................... 6
1.2
Acronyms........................................................................................................... 7
1.3
Conventions ....................................................................................................... 7
Functional Overview
.................................................................................................. 9
2.1
Block Diagram .................................................................................................. 11
2.2
Memory Map..................................................................................................... 12
Package Information
............................................................................................... 13
3.1
56-Lead TSOP Package for 32-, 64-, 128-Mbit ....................................................... 13
3.2
64-Ball Numonyx™ Easy BGA Package for 32-, 64-, 128-Mbit.................................. 14
Ballouts/Pinouts and Signal Descriptions
................................................................ 16
4.1
Numonyx™ Easy BGA Ballout for 32-, 64-, 128-Mbit .............................................. 16
4.2
56-Lead TSOP Package Pinout for 32-, 64-,128-Mbit .............................................. 17
4.3
Signal Descriptions ............................................................................................ 18
Maximum Ratings and Operating Conditions............................................................
19
5.1
Absolute Maximum Ratings................................................................................. 19
5.2
Operating Conditions ......................................................................................... 19
5.3
Power-Up/Down ................................................................................................ 19
5.3.1 Power-Up/Down Sequence....................................................................... 19
5.3.2 Power Supply Decoupling ........................................................................ 20
5.4
Reset............................................................................................................... 20
Electrical Characteristics
......................................................................................... 21
6.1
DC Current Specifications ................................................................................... 21
6.2
DC Voltage specifications.................................................................................... 22
6.3
Capacitance...................................................................................................... 22
AC Characteristics
................................................................................................... 23
7.1
Read Specifications............................................................................................ 23
7.2
Program, Erase, Block-Lock Specifications ............................................................ 28
7.3
Reset Specifications........................................................................................... 28
7.4
AC Test Conditions ............................................................................................ 29
Bus Interface...........................................................................................................
30
8.1
Bus Reads ........................................................................................................ 31
8.1.1 Asynchronous Page Mode Read ................................................................ 31
8.1.2 Output Disable ....................................................................................... 32
8.2
Bus Writes........................................................................................................ 32
8.3
Standby ........................................................................................................... 33
8.3.1 Reset/Power-Down ................................................................................. 33
8.4
Device Commands............................................................................................. 33
Flash Operations
..................................................................................................... 34
9.1
Status Register ................................................................................................. 34
9.1.1 Clearing the Status Register .................................................................... 35
9.2
Read Operations ............................................................................................... 35
9.2.1 Read Array ............................................................................................ 35
9.2.2 Read Status Register .............................................................................. 36
9.2.3 Read Device Information ......................................................................... 36
9.2.4 CFI Query ............................................................................................. 36
9.3
Programming Operations.................................................................................... 36
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
May 2009
208032-01
Datasheet
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Numonyx™ Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)
9.4
9.5
9.6
9.7
9.3.1 Single-Word/Byte Programming................................................................36
9.3.2 Buffered Programming ............................................................................37
Block Erase Operations .......................................................................................38
Suspend and Resume .........................................................................................39
Status Signal ....................................................................................................40
Security and Protection.......................................................................................41
9.7.1 Normal Block Locking ..............................................................................41
9.7.2 Configurable Block Locking.......................................................................42
9.7.3 Password Access.....................................................................................42
9.7.4 128-bit Protection Register.......................................................................42
9.7.5 Reading the 128-bit Protection Register .....................................................42
9.7.6 Programming the 128-bit Protection Register..............................................42
9.7.7 Locking the 128-bit Protection Register......................................................43
9.7.8 VPEN Protection......................................................................................44
10.0 ID Codes
..................................................................................................................46
11.0 Device Command Codes
...........................................................................................47
12.0 Flow Charts..............................................................................................................48
13.0 Common Flash Interface
..........................................................................................57
13.1 Query Structure Output ......................................................................................57
13.2 Query Structure Overview...................................................................................58
13.3 Block Status Register .........................................................................................59
13.4 CFI Query Identification String ............................................................................59
13.5 System Interface Information..............................................................................60
13.6 Device Geometry Definition .................................................................................60
13.7 Primary-Vendor Specific Extended Query Table ......................................................61
A
B
Additional Information.............................................................................................64
Ordering Information...............................................................................................65
Datasheet
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May 2009
208032-01
Numonyx™ Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)
Revision History
Date
May 2009
Revision
01
Description
Initial release
May 2009
208032-01
Datasheet
5
单片机
