INTEGRATED CIRCUITS
DATA SHEET
TEA0675
Dual Dolby* B-type noise reduction
circuit for playback applications
Preliminary specification
Supersedes data of July 1993
File under Integrated Circuits, IC01
1996 Jun 07
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit
for playback applications
FEATURES
•
Dual noise reduction (NR) channels
•
Head pre-amplifiers
•
Reverse head switching
•
Automatic Music Search (AMS)
•
Music scan
•
Equalization with electronically switched time constants
•
Dolby reference level = 387.5 mV
•
24 pins
•
Improved EMC behaviour.
GENERAL DESCRIPTION
The TEA0675 is a bipolar integrated circuit that provides
two channels of Dolby B noise reduction for playback
applications in car radios. It includes head and
equalization amplifiers with electronically switchable time
constants. Furthermore it includes electronically
switchable inputs for tape drivers with reverse heads.
QUICK REFERENCE DATA
SYMBOL
V
CC
I
CC
S
+
N
-------------
-
N
supply voltage
supply current
signal plus noise-to-noise ratio
PARAMETER
−
78
MIN.
7.6
−
26
84
TYP.
TEA0675
This device also detects pauses of music in the Automatic
Music Search (AMS) scan mode, for applications with an
intelligent controlled tape driver, or AMS-latch mode, for
applications with a simple controlled tape driver. For both
modes, the delay time can be fixed externally by a resistor.
The device operates with power supplies in the range of
7.6 to 12 V, output overload level increasing with increase
in supply voltage.
Current drain varies with the following variables:
supply voltage
noise reduction on/off
AMS on/off.
Because of this current drain variation it is advisable to use
a regulated power supply or a supply with a long time
constant.
MAX.
12
31
−
UNIT
V
mA
dB
ORDERING INFORMATION
TYPE
NUMBER
TEA0675
TEA0675T
PACKAGE
NAME
SDIP24
SO24
DESCRIPTION
plastic shrink dual in-line package; 24 leads (400 mil)
plastic small outline package; 24 leads; body width 7.5 mm
VERSION
SOT234-1
SOT137-1
Remark Dolby*:
Available only to licensees of Dolby Laboratories Licensing Corporation, San Francisco, CA94111,
USA, from whom licensing and application information must be obtained. Dolby is a registered trade-mark of Dolby
Laboratories Licensing Corporation.
1996 Jun 07
2
1996 Jun 07
handbook, full pagewidth
BLOCK DIAGRAM
180
Ω
headswitch
input
2 1
10
µF
470
pF
330
kΩ
1 kΩ
470
pF
10
µF
AMS
output
NR
4.7
nF
120
µs
10
nF
8.2
kΩ
27
kΩ
24
kΩ
18
kΩ
70
µs
ON
1.5
kΩ
EQ
Philips Semiconductors
10
µF
180
kΩ
330
nF
15
nF
OFF
100
nF
output B
270 kΩ
24
23
22
21
20
19
18
17
16
15
14
13
DOLBY B
EQ
AMP.
AMS
PROCESSOR
LOGIC
POWER
SUPPLY
PRE
AMP.
LATCH AND
RISE TIME
TEA0675
Dual Dolby* B-type noise reduction circuit
for playback applications
3
DELAY
TIME
EQ
AMP.
4
5
6
7
8
9
VCC
PRE
AMP.
1.5
kΩ
Rt
ON
4.7
nF
(1)
LEVEL
DETECTOR
DOLBY B
1
2
3
10
11
12
270 kΩ
24
kΩ
8.2
kΩ
10
nF
330
kΩ
10
µF
180
kΩ
15
nF
OFF
AMS
100
µF
470
pF
1 kΩ
180
Ω
10
µF
470
pF
output A
330
nF
100
nF
(1) Switched to V
CC
for AMS-scan mode.
MED621
Preliminary specification
TEA0675
Fig.1 Block and application diagram.
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit
for playback applications
PINNING
SYMBOL
OUTA
INTA
CONTRA
HPA
SCA
TD
EQA
EQFA
V
CC
INA1
V
ref
INA2
INB2
HS
INB1
GND
EQFB
EQB
AMSEQ
SCB
HPB
CONTRB
INTB
OUTB
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
DESCRIPTION
output channel A
integrating filter channel A
control voltage channel A
high-pass filter channel A
side chain channel A
delay time constant
equalizing output channel A
equalizing input channel A
supply voltage
input channel A1 (forward or reverse)
reference voltage
input channel A2 (reverse or forward)
input channel B2 (reverse or forward)
head switch input
input channel B1 (forward or reverse)
ground
equalizing input channel B
equalizing output channel B
AMS output and EQ switch input
side chain channel B
high-pass filter channel B
control voltage channel B
integrating filter channel B
output channel B
Fig.2 Pin configuration.
handbook, halfpage
TEA0675
OUTA
INTA
CONTRA
HPA
SCA
TD
EQA
EQFA
VCC
1
2
3
4
5
6
24 OUTB
23 INTB
22 CONTRB
21 HPB
20 SCB
19 AMSEQ
TEA0675
7
8
9
18 EQB
17 EQFB
16 GND
15 INB1
14 HS
13 INB2
MED622
INA1 10
Vref 11
INA2 12
1996 Jun 07
4
Philips Semiconductors
Preliminary specification
Dual Dolby* B-type noise reduction circuit
for playback applications
FUNCTIONAL DESCRIPTION
Noise Reduction (NR)
is enabled when pin HPB is
open-circuit and disabled when connected to GND via an
1.5 kΩ resistor.
Dolby B noise reduction only operates correctly if 0 dB
Dolby level is adjusted at 387.5 mV.
Automatic Music Search (AMS) scan mode
is enabled
when pin HPA is connected to V
CC
via an 1.5 kΩ resistor
and disabled when pin HPA is open-circuit. Switching AMS
on, internally NR is switched OFF simultaneously
(see Figs 5 and 6 for principle timing in AMS-scan mode).
AMS-latch mode
is enabled when pin HPA is connected
to GND via an 1.5 kΩ resistor and disabled when pin HPA
is open-circuit. Switching AMS on, NR is switched off
internally. In this mode the device detects a pause level
signal, when a music level signal has appeared first
(see Figs 7 and 8 for principle timing). Furthermore a
longer rise time constant is supplied for suppressing the
detection of plops on tape. The output signal at pin
AMSEQ in this mode may be applied to drive a tape driver
logic circuit.
TEA0675
Equalization time constant switching
(70
µs
or 120
µs)
is achieved when pin AMSEQ is connected to GND via an
18 kΩ resistor (120
µs),
or left open-circuit (70
µs).
This does not affect the AMS output signal during AMS
mode (see Fig.1).
Head switching
is achieved when pin HS is connected
(input IN2 active) to GND via a 27 kΩ resistor, or left
open-circuit (input IN1 active). The 10
µF
capacitor at pin
HS sets the time constants for smooth switching.
In AMS mode the signals of both channels are rectified and
then added. This means, even if one channel signal
appears inverted to the other channel, the normal AMS
function is ensured. Pins HPB and HPA perform the
function of a logic input for AMS, respectively NR mode
switching in both channels and provide the frequency
dependent feedback of the control chain amplifier in the
corresponding channel. Thus it is important that no voltage
is applied to pins HPB and HPA during NR on/AMS off
mode, otherwise this will cause irregular NR
characteristics.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
V
CC
V
i
t
short
T
stg
T
amb
V
es
supply voltage
input voltage (except pin 11)
pin 11 (V
ref
) to V
CC
short-circuiting duration
storage temperature
operating ambient temperature
electrostatic handling voltage for all pins
note 1
note 2
Notes
1. Human body model (1.5 kΩ, 100 pF).
2. Machine model (0
Ω,
200 pF).
PARAMETER
CONDITIONS
0
−0.3
−
−55
−40
−2
−500
MIN.
MAX.
14
+V
CC
5
+150
+85
+2
+500
V
V
s
°C
°C
kV
V
UNIT
1996 Jun 07
5
