Product Data Sheet
October 9, 2001
SPDT FET Switch
TGS8122-SCC
Key Features and Performance
•
•
•
•
•
•
•
8 to 11 GHz Frequency Range
0.9 dB Typical Insertion Loss
40 dB Typical Isolation at 9 GHz
1.5:1 Typical Input SWR at Midband
1.4:1 Typical Output SWR at Midband
Less Than 2 ns Rise/Fall Time
1.7517 x 0.7739 x 0.152 mm (0.069 x
0.0305 x 0.006 in.)
Description
The TriQuint TGS8122-SCC is a monolithic single-pole, double-throw (SPDT) GaAs
FET switch designed for 8 to 11 GHz. This device has low insertion loss, low leakage
current of less than 50 uA with control voltages of -7 V and 0 V, and rise and fall times
are less than 2 ns. Ground is provided to the circuitry through vias to the backside
metallization.
This switch is ideal for use in high-speed switching radar and communication systems.
Bond pad and backside metallization is gold plated for compatibility with eutectic alloy
attachment methods as well as the thermocompression and thermosonic wire-bonding
processes.
The TGS8122-SCC is supplied in chip form and is readily assembled using automated
equipment.
TriQuint Semiconductor Texas : (972)994 8465
Fax: (972)994 8504 Web: www.triquint.com
1
Product Data Sheet
TGS8122-SCC
TriQuint Semiconductor Texas : (972)994 8465
Fax: (972)994 8504 Web: www.triquint.com
2
Product Data Sheet
TGS8122-SCC
TABLE I
MAXIMUM RATINGS
SYMBOL
P
IN
*
PARAMETER
INPUT CONTINUOUS WAVE POWER
CONTROL VOLTAGE RANGE
OPERATING CHANNEL TEMPERATURE
MOUNTING TEMPERATURE
(30 SECONDS)
STORAGE TEMPERATURE
VALUE
3W
-10V to 0V
150 C
320 C
-65 to 150 C
0
0
0
V
CTRL1,2
T
CH
T
M
T
STG
**
Ratings over channel temperature range, T
CH
(unless otherwise noted)
Stresses beyond those listed under “Maximum Ratings” may cause permanent damage to the
device.
These are stress ratings only, and functional operation of the device at these or any other
conditions beyond those indicated under “RF Specifications” is not implied. Exposure to maximum
rated conditions for extended periods may affect device reliability.
* DC blocks are not provided at RF ports.
** Operating channel temperature, T
CH
, directly affects the device MTTF. For maximum life, it is
recommended that channel temperature be maintained at the lowest possible level.
TriQuint Semiconductor Texas : (972)994 8465
Fax: (972)994 8504 Web: www.triquint.com
3
Product Data Sheet
TGS8122-SCC
TABLE II
DC PROBE TESTS (100%)
(T
A
= 25
°C
+ 5
°C)
NOTES
SYMBOL
I
DSS
G
m
2/
2/
2/
1/
2/
3/
|V
P
|
|V
BVGD
|
|V
BVGS
|
TEST CONDITIONS
3/
1/
1/
1/
1/
1/
LIMITS
MIN
378
216
2.0
8
8
MAX
702
360
3.6
30
30
mA
mS
V
V
V
UNITS
FET 1 and 2 are probed simultaneously with a total gate width of 1800
µm.
V
P
, V
BVGD
, and V
BVGS
are negative.
Measurement conditions shall be subject to change at manufacturer’s discretion with appropriate
notification to the buyer.
TABLE III
RF WAFER CHARACTERIZATION TEST
(T
A
= 25°C + 5°C)
NOTE
TEST
MEASUREMENT
CONDITIONS
2/
F = 8 – 11 GHz
F = 8 GHz
F = 9 GHz
F = 10 GHz
F = 11 GHz
F = 8 – 9 GHz
F = 9 – 11 GHz
1/
POWER OUTPUT AT
1 dB GAIN
COMPRESSION (N)
INPUT STANDING
WAVE RATIO
OUTPUT STANDING
WAVE RATIO
1/
1/
INPUT RETURN LOSS
MAGNITUDE (N)
F = 8 – 11 GHz
30
24
22.5
27.5
dBm
VALUE
MIN
TYP
0.9
30
40
42
31
MAX
1.25
dB
DB
UNITS
1/
1/
SMALL-SIGNAL
INSERTION LOSS (N)
SMALL-SIGNAL
ISOLATION (F)
F = 8 – 11 GHz
F = 8 – 11 GHz
F = 8 – 11 GHz
10
10
1.5:1
1.4:1
dB
dB
<2
nS
OUTPUT RETURN
F = 8 – 11 GHz
LOSS MAGNITUDE (N)
RISE TIME, DETECTED P
IN
= 8 dBm @
OUTPUT VOLTAGE
10GHz.
LEVEL
FALL TIME,
DETECTED OUTPUT
VOLTAGE LEVEL
P
IN
= 8 dBm @
10GHz.
<2
nS
1/
2/
“N” represents “ON” state (low loss state). “F” represents “OFF” state (isolated state).
See Table IV.
TriQuint Semiconductor Texas : (972)994 8465
Fax: (972)994 8504 Web: www.triquint.com
4
Product Data Sheet
TGS8122-SCC
TABLE IV
SWITCH BIAS CONDITIONS
CONTROL VOLTAGE
V
CTRL1
-7 V
0V
V
CTRL2
0V
-7 V
RF
common
– RF
output1
RF PATH
LOW LOSS
ISOLATED
STATE
N
F
RF
common
– RF
output2
RF PATH
ISOLATED
LOW LOSS
STATE
F
N
TABLE V
AUTOPROBE FET PARAMETER MEASUREMENT CONDITONS
FET Parameters
I
DSS
:
Maximum drain current (I
DS
) with gate voltage
(V
GS
) at zero volts.
Test Conditions
V
GS
= 0.0 V, drain voltage (V
DS
) is swept from 0.5 V
up to a maximum of 3.5 V in search of the maximum
value of I
DS
; voltage for I
DSS
is recorded as VDSP.
For all material types, V
DS
is swept between 0.5 V
and VDSP in search of the maximum value of I
ds
.
This maximum I
DS
is recorded as IDS1. For
Intermediate and Power material, IDS1 is measured
at V
GS
= VG1 = -0.5 V. For Low Noise, HFET and
pHEMT material, V
GS
= VG1 = -0.25 V. For
LNBECOLC, use V
GS
= VG1 = -0.10 V.
V
DS
fixed at 2.0 V, V
GS
is swept to bring I
DS
to
0.5 mA/mm.
Drain fixed at ground, source not connected
(floating), 1.0 mA/mm forced into gate, gate-to-drain
voltage (V
GD
) measured is V
BVGD
and recorded as
BVGD; this cannot be measured if there are other
DC connections between gate-drain, gate-source or
drain-source.
Source fixed at ground, drain not connected
(floating), 1.0 mA/mm forced into gate, gate-to-
source voltage (V
GS
) measured is V
BVGS
and recorded
as BVGS; this cannot be measured if there are other
DC connections between gate-drain, gate-source or
drain-source.
G
m
(
I
:
Transconductance;
DSS
−
IDS1
)
VG1
V
P
:
Pinch-Off Voltage; V
GS
for I
DS
= 0.5 mA/mm of
gate width.
V
BVGD
:
Breakdown Voltage, Gate-to-Drain; gate-to-
drain breakdown current (I
BD
) = 1.0 mA/mm
of gate width.
V
BVGS
:
Breakdown Voltage, Gate-to-Source; gate-to-
source breakdown current (I
BS
) = 1.0 mA/mm
of gate width.
TriQuint Semiconductor Texas : (972)994 8465
Fax: (972)994 8504 Web: www.triquint.com
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