THC63LVDM83C(5S) _Rev.1.10_E
THC63LVDM83C(5S)
REDUCED SWING LVDS 24Bit COLOR HOST-LCD PANEL INTERFACE
General Description
The THC63LVDM83C(5S) transmitter is designed to
support pixel data transmission between Host and Flat
Panel Display from NTSC up to SXGA+ resolutions.
The THC63LVDM83C(5S) converts 28bits of CMOS/
TTL data into LVDS(Low Voltage Differential Signal-
ing) data stream. The transmitter can be programmed
for rising edge or falling edge clocks through a dedi-
cated pin. At a transmit clock frequency of 85MHz,
24bits of RGB data and 4bits of timing and control data
(HSYNC, VSYNC, CNTL1, CNTL2) are transmitted at
an effective rate of 595Mbps per LVDS channel.
Features
•
Wide dot clock range: 8-85MHz suited for NTSC,
•
•
•
•
•
•
•
•
•
•
VGA, SVGA, XGA
PLL requires no external components
Supports spread spectrum clock generator
On chip jitter filtering
Clock edge selectable
Supports reduced swing LVDS for low EMI
Power down mode
Low power single 3.3V CMOS design
Low profile 56 Lead TSSOP Package
1.2 up to 3.3V tolerant data inputs to connect
directly to low power,low voltage application and
graphic processor.
Backward compatible with
THC63LVDM83R(24bits)
Block Diagram
THC63LVDM83C(5S)
CMOS/TTL
INPUTS
TA0-6
TB0-6
TC0-6
TD0-6
7
7
7
7
TTL PARALLEL TO SERIAL
DATA
(LVDS)
TA +/-
TB +/-
TC +/-
TD +/-
(56-595Mbit/On Each
LVDS Channel)
TRANSMITTER
CLKIN
(8 to 85MHz)
R/F
/PDWN
RS
PLL
TCLK +/-
CLOCK
(LVDS)
8-85MHz
Copyright (C)2015 THine Electronics, Inc.
1/12
THine Electronics, Inc.
Security E
THC63LVDM83C(5S)_Rev.1.10_E
Pin Out
THC63LVDM83C(5S)
RS
TD1
TA5
TA6
GND
TB0
TB1
TD2
VCC
TD3
TB2
TB3
GND
TB4
TB5
TD4
R/F
TD5
TB6
TC0
GND
TC1
TC2
TC3
TD6
VCC
TC4
TC5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
TA4
TA3
TA2
GND
TA1
TA0
TD0
LVDS GND
TA-
TA+
TB-
TB+
LVDS VCC
LVDS GND
TC-
TC+
TCLK-
TCLK+
TD-
TD+
LVDS GND
PLL GND
PLL VCC
PLL GND
/PDWN
CLK IN
TC6
GND
Copyright (C)2015 THine Electronics, Inc.
2/12
THine Electronics, Inc.
Security E
THC63LVDM83C(5S)_Rev.1.10_E
Pin Description
Pin Name
TA+, TA-
TB+, TB-
TC+, TC-
TD+, TD-
TCLK+, TCLK-
TA0 ~ TA6
TB0 ~ TB6
TC0 ~ TC6
TD0 ~ TD6
/PDWN
Pin #
47, 48
45, 46
41, 42
37, 38
39, 40
51, 52, 54, 55, 56, 3, 4
6, 7, 11, 12, 14, 15, 19
20, 22, 23, 24, 27, 28, 30
50, 2, 8, 10, 16, 18, 25
32
Type
LVDS OUT
LVDS OUT
LVDS OUT
LVDS OUT
LVDS OUT
IN
IN
IN
IN
IN
H: Normal operation,
L: Power down (all outputs are Hi-Z)
LVDS swing mode, VREF select.
Pixel Data Inputs.
LVDS Clock Out.
LVDS Data Out.
Description
RS
LVDS
Swing
350mV
350mV
200mV
Small Swing
Input Support
N/A
RS=VREF
a
N/A
RS
1
IN
VCC
0.6 ~ 1.4V
GND
a. VREF is Input Reference Voltage.
R/F
VCC
CLKIN
GND
LVDS VCC
LVDS GND
PLL VCC
PLL GND
17
9, 26
31
5, 13, 21,
29, 53
44
36, 43, 49
34
33, 35
IN
Power
IN
Ground
Power
Ground
Power
Ground
Input Clock Triggering Edge Select.
H: Rising edge, L: Falling edge
Power Supply Pins for TTL inputs and digital
circuitry.
Clock in.
Ground Pins for TTL inputs and digital circuitry.
Power Supply Pins for LVDS Outputs.
Ground Pins for LVDS Outputs.
Power Supply Pin for PLL circuitry.
Ground Pins for PLL circuitry.
Copyright (C)2015 THine Electronics, Inc.
3/12
THine Electronics, Inc.
Security E
THC63LVDM83C(5S) _Rev.1.10_E
Absolute Maximum Ratings
1
Supply Voltage (V
CC
)
CMOS/TTL Input Voltage
CMOS/TTL Output Voltage
LVDS Driver Output Voltage
Output Current
Junction Temperature
Storage Temperature Range
Resistance to soldering heat
Maximum Power Dissipation @+25
°C
-0.3V ~ +4.0V
-0.3V ~ (V
CC
+ 0.3V)
-0.3V ~ (V
CC
+ 0.3V)
-0.3V ~ (V
CC
+ 0.3V)
continuous
+125
°C
-55
°C
~ +150
°C
+260
°C
/10sec
0.5W
Recommended Operating Conditions
Parameter
All Supply Voltage
Operating Ambient Temperature
CLK IN Frequency
Min
3.0
-40
8
Typ
3.3
Max
3.6
85
85
Units
V
°C
MHz
1. “Absolute Maximum Ratings” are those valued beyond which the safety of the device can not be guaranteed. They
are not meant to imply that the device should be operated at these limits. The tables of “Electrical Characteristics”
specify conditions for device operation.
Copyright (C)2015 THine Electronics, Inc.
4/12
THine Electronics, Inc.
Security E
THC63LVDM83C(5S)_Rev.1.10_E
Electrical Characteristics
CMOS/TTL DC Specifications
V
CC
= VCC = PLL VCC = LVDS VCC
Symbol
V
IH
V
IL
V
DDQ1
V
REF
V
SH2
V
SL2
I
INC
Parameter
High Level Input Voltage
Low Level Input Voltage
Small Swing Voltage
Input Reference Voltage
Small Swing High Level
Input Voltage
Small Swing Low Level
Input Voltage
Input Current
Small Swing (RS=V
DDQ
/2)
V
REF
= V
DDQ
/2
V
REF
= V
DDQ
/2
0V
≤
V
IN
≤
V
CC
Conditions
RS=VCC or GND
RS=VCC or GND
Min.
2.0
GND
1.2
Typ.
Max.
V
CC
0.8
2.8
Units
V
V
V
V
DDQ
/2
V
DDQ
/2
+100mV
V
DDQ
/2
-100mV
±
10
V
V
uA
Notes:
1
V
DDQ
voltage defines max voltage of small swing input. It is not an actual input voltage.
2
Small swing signal is applied to TA0-6,TB0-6,TC0-6,TD0-6 and CLKIN.
LVDS Transmitter DC Specifications
V
CC
= VCC = PLL VCC = LVDS VCC
Symbol
Parameter
Conditions
Normal
swing
VOD
Differential Output Voltage
RL=100Ω
RS=V
CC
Reduced
swing
RS=GND
ΔVOD
VOC
ΔVOC
I
OS
I
OZ
Change in VOD between
complementary output states
Common Mode Voltage
Change in VOC between
complementary output states
Output Short Circuit Current
Output TRI-STATE Current
VOUT=0V, RL=100Ω
/PDWN=0V,
V
OUT
=0V to V
CC
RL=100Ω
1.125
1.25
35
1.375
35
-24
±
10
Min.
250
Typ.
350
Max.
500
Units
mV
100
200
300
mV
mV
V
mV
mA
uA
Copyright (C)2015 THine Electronics, Inc.
5/12
THine Electronics, Inc.
Security E
