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TISP4125M3LM

SILICON SURGE PROTECTOR, DO-92, PLASTIC, DO-92, 2 PIN

器件类别:模拟混合信号IC    触发装置   

厂商名称:J.W. Miller ( Bourns )

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器件参数
参数名称
属性值
厂商名称
J.W. Miller ( Bourns )
零件包装代码
DO-92
包装说明
CYLINDRICAL, O-PBCY-T2
针数
2
Reach Compliance Code
unknow
JESD-30 代码
O-PBCY-T2
端子数量
2
封装主体材料
PLASTIC/EPOXY
封装形状
ROUND
封装形式
CYLINDRICAL
认证状态
Not Qualified
表面贴装
NO
端子形式
THROUGH-HOLE
端子位置
BOTTOM
触发设备类型
SILICON SURGE PROTECTOR
文档预览
TISP4070M3LM THRU TISP4115M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
Copyright © 2000, Power Innovations Limited, UK
NOVEMBER 1997 - REVISED OCTOBER 2000
TELECOMMUNICATION SYSTEM MEDIUM CURRENT OVERVOLTAGE PROTECTORS
G
G
4 kV 10/700, 100 A 5/310 ITU-T K.20/21 rating
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
DEVICE
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4220
‘4240
‘4250
‘4260
‘4290
‘4300
‘4350
‘4395
‘4400
V
DRM
V
58
65
75
90
100
120
135
145
160
180
190
200
220
230
275
320
300
V
(BO)
V
70
80
95
115
125
145
165
180
220
240
250
260
290
300
350
395
400
LM PACKAGE
(TOP VIEW)
T(A)
NC
R(B)
1
2
3
MD4XAT
NC - No internal connection on pin 2
LMF PACKAGE
(LM PACKAGE WITH FORMED LEADS)
(TOP VIEW)
T(A)
NC
R(B)
1
2
3
MD4XAKB
NC - No internal connection on pin 2
device symbol
T
G
Rated for International Surge Wave Shapes
WAVE SHAPE
2/10 µs
8/20 µs
10/160 µs
10/700 µs
10/560 µs
10/1000 µs
STANDARD
GR-1089-CORE
IEC 61000-4-5
FCC Part 68
ITU-T K.20/21
FCC Part 68
FCC Part 68
GR-1089-CORE
I
TSP
A
300
220
120
100
75
50
R
SD4XAA
Terminals T and R correspond to the
alternative line designators of A and B
G
G
HOW TO ORDER
Low Differential Capacitance . . . 43 pF max.
................. UL Recognized Component
DEVICE
TISP4xxxM3LM
PACKAGE
Straight Lead DO-92 (LM)
CARRIER
Tape and Reeled
Bulk Pack
ORDER AS
TISP4xxxM3LMR
TISP4xxxM3LM
Formed Lead DO-92 (LMF) Tape and Reeled TISP4xxxM3LMFR
Insert xxx value corresponding to protection voltages of 070, 080, 095, 115 etcetera.
description
These devices are designed to limit overvoltages on the telephone line. Overvoltages are normally caused by
a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. A
single device provides 2-point protection and is typically used for the protection of 2-wire telecommunication
PRODUCT
INFORMATION
A Bourns Company
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
1
TISP4070M3LM THRU TISP4115M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
equipment (e.g. between the Ring to Tip wires for telephones and modems). Combinations of devices can be
used for multi-point protection (e.g. 3-point protection between Ring, Tip and Ground).
The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially
clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to
crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the
overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup
as the diverted current subsides.
This TISP4xxxM3LM range consists of seventeen voltage variants to meet various maximum system voltage
levels (58 V to 320 V). They are guaranteed to voltage limit and withstand the listed international lightning
surges in both polarities. These protection devices are supplied in a DO-92 (LM) cylindrical plastic package.
The TISP4xxxM3LM is a straight lead DO-92 supplied in bulk pack and on tape and reeled. The
TISP4xxxM3LMF is a formed lead DO-92 supplied only on tape and reeled.
absolute maximum ratings,
T
A
= 25 °C (unless otherwise noted)
RATING
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
Repetitive peak off-state voltage, (see Note 1)
‘4220
‘4240
‘4250
‘4260
‘4290
‘4300
‘4350
‘4395
‘4400
Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)
2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape)
8/20 µs (IEC 61000-4-5, combination wave generator, 1.2/50 voltage, 8/20 current)
10/160 µs (FCC Part 68, 10/160 µs voltage wave shape)
5/200 µs (VDE 0433, 10/700 µs voltage wave shape)
0.2/310 µs (I3124, 0.5/700 µs voltage wave shape)
5/310 µs (ITU-T K.20/21, 10/700 µs voltage wave shape)
5/310 µs (FTZ R12, 10/700 µs voltage wave shape)
5/320 µs (FCC Part 68, 9/720 µs voltage wave shape)
10/560 µs (FCC Part 68, 10/560 µs voltage wave shape)
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape)
NOTES: 1.
2.
3.
4.
See Applications Information and Figure 10 for voltage values at lower temperatures.
Initially the TISP4xxxM3LM must be in thermal equilibrium with T
J
= 25 °C.
The surge may be repeated after the TISP4xxxM3LM returns to its initial conditions.
See Applications Information and Figure 11 for current ratings at other temperatures.
I
TSP
300
220
120
110
100
100
100
100
75
50
A
V
DRM
SYMBOL
VALUE
± 58
± 65
± 75
± 90
±100
±120
±135
±145
±160
±180
±190
±200
±220
±230
±275
±320
±300
V
UNIT
PRODUCT
2
INFORMATION
TISP4070M3LM THRU TISP4115M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
absolute maximum ratings,
T
A
= 25 °C (unless otherwise noted) (continued)
RATING
Non-repetitive peak on-state current (see Notes 2, 3 and 5)
20 ms (50 Hz) full sine wave
16.7 ms (60 Hz) full sine wave
1000 s 50 Hz/60 Hz a.c.
Initial rate of rise of on-state current,
Junction temperature
Storage temperature range
Exponential current ramp, Maximum ramp value < 100 A
di
T
/dt
T
J
T
stg
I
TSM
30
32
2.1
300
-40 to +150
-65 to +150
A/µs
°C
°C
A
SYMBOL
VALUE
UNIT
NOTES: 2. Initially the TISP4xxxM3LM must be in thermal equilibrium with T
J
= 25 °C.
3. The surge may be repeated after the TISP4xxxM3LM returns to its initial conditions.
5. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 8 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient temperatures
above 25 °C
electrical characteristics, T
A
= 25 °C (unless otherwise noted)
PARAMETER
I
DRM
Repetitive peak off-
state current
V
D
= ±V
DRM
TEST CONDITIONS
T
A
= 25 °C
T
A
= 85 °C
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
V
(BO)
Breakover voltage
dv/dt = ±750 V/ms,
R
SOURCE
= 300
‘4220
‘4240
‘4250
‘4260
‘4290
‘4300
‘4350
‘4395
‘4400
MIN
TYP
MAX
±5
±10
±70
±80
±95
±115
±125
±145
±165
±180
±220
±240
±250
±260
±290
±300
±350
±395
±400
V
UNIT
µA
PRODUCT
INFORMATION
3
TISP4070M3LM THRU TISP4115M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
electrical characteristics, T
A
= 25 °C (unless otherwise noted) (continued)
PARAMETER
TEST CONDITIONS
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
dv/dt
±1000 V/µs, Linear voltage ramp,
V
(BO)
Impulse breakover
voltage
Maximum ramp value = ±500 V
di/dt = ±20 A/µs, Linear current ramp,
Maximum ramp value = ±10 A
‘4165
‘4180
‘4220
‘4240
‘4250
‘4260
‘4290
‘4300
‘4350
‘4395
‘4400
I
(BO)
V
T
I
H
dv/dt
I
D
Breakover current
On-state voltage
Holding current
Critical rate of rise of
off-state voltage
Off-state current
dv/dt = ±750 V/ms,
R
SOURCE
= 300
±0.15
±0.15
±5
T
A
= 85 °C
V
d
= 1 V rms, V
D
= 0,
4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
f = 100 kHz,
V
d
= 1 V rms, V
D
= -1 V
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
C
off
Off-state capacitance
f = 100 kHz,
V
d
= 1 V rms, V
D
= -2 V
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
f = 100 kHz,
V
d
= 1 V rms, V
D
= -50 V
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
f = 100 kHz,
(see Note 6)
NOTE
6: To avoid possible voltage clipping, the ‘4125 is tested with V
D
= -98 V.
V
d
= 1 V rms, V
D
= -100 V
‘4125 thru ‘4220
‘4240 thru ‘4400
86
60
54
80
56
50
74
52
46
36
26
20
20
16
±10
110
80
70
96
74
64
90
70
60
47
36
30
30
24
pF
I
T
= ±5 A, t
W
= 100 µs
I
T
= ±5 A, di/dt = -/+30 mA/ms
Linear voltage ramp, Maximum ramp value < 0.85V
DRM
V
D
= ±50 V
f = 100 kHz,
MIN
TYP
MAX
±78
±88
±102
±122
±132
±151
±171
±186
±227
±247
±257
±267
±298
±308
±359
±405
±410
±0.6
±3
±0.6
A
V
A
kV/µs
µA
V
UNIT
thermal characteristics
PARAMETER
TEST CONDITIONS
EIA/JESD51-3 PCB, I
T
= I
TSM(1000)
,
R
θ
JA
Junction to free air thermal resistance
T
A
= 25 °C, (see Note 7)
265 mm x 210 mm populated line card,
4-layer PCB, I
T
= I
TSM(1000)
, T
A
= 25 °C
NOTE
57
MIN
TYP
MAX
120
°C/W
UNIT
7: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
PRODUCT
4
INFORMATION
TISP4070M3LM THRU TISP4115M3LM, TISP4125M3LM THRU TISP4220M3LM,
TISP4240M3LM THRU TISP4400M3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED OCTOBER 2000
PARAMETER MEASUREMENT INFORMATION
+i
I
TSP
Quadrant I
Switching
Characteristic
I
TSM
I
T
V
T
I
H
V
(BO)
I
(BO)
-v
V
DRM
I
DRM
V
D
I
D
I
D
V
D
V
DRM
I
DRM
+v
I
(BO)
I
H
V
(BO)
V
T
I
T
I
TSM
Quadrant III
Switching
Characteristic
I
TSP
-i
PMXXAAB
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR T AND R TERMINALS
ALL MEASUREMENTS ARE REFERENCED TO THE R TERMINAL
PRODUCT
INFORMATION
5
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