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TLC2652IP

OP-AMP, 4.95uV OFFSET-MAX, 1.9MHz BAND WIDTH, PDIP8, ROHS COMPLIANT, PLASTIC, DIP-8

器件类别:模拟混合信号IC    放大器电路   

厂商名称:Rochester Electronics

厂商官网:https://www.rocelec.com/

器件标准:  

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
Rochester Electronics
零件包装代码
DIP
包装说明
ROHS COMPLIANT, PLASTIC, DIP-8
针数
8
Reach Compliance Code
unknown
放大器类型
OPERATIONAL AMPLIFIER
最大平均偏置电流 (IIB)
0.00015 µA
标称共模抑制比
140 dB
最大输入失调电压
4.95 µV
JESD-30 代码
R-PDIP-T8
JESD-609代码
e4
长度
9.81 mm
湿度敏感等级
NOT APPLICABLE
负供电电压上限
-8 V
标称负供电电压 (Vsup)
-5 V
功能数量
1
端子数量
8
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
DIP
封装形状
RECTANGULAR
封装形式
IN-LINE
峰值回流温度(摄氏度)
NOT SPECIFIED
座面最大高度
5.08 mm
标称压摆率
2.8 V/us
供电电压上限
8 V
标称供电电压 (Vsup)
5 V
表面贴装
NO
技术
CMOS
温度等级
INDUSTRIAL
端子面层
NICKEL PALLADIUM GOLD
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
标称均一增益带宽
1900 kHz
宽度
7.62 mm
文档预览
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TLC2652, TLC2652A, TLC2652Y
Advanced LinCMOS PRECISION CHOPPER STABILIZED
OPERATIONAL AMPLIFIERS
SLOS019E − SEPTEMBER 1988 − REVISED FEBRUARY 2005
D
Extremely Low Offset Voltage . . . 1
µV
Max
D
Extremely Low Change on Offset Voltage
D
D
D
D
D
D
D
With Temperature . . . 0.003
µV/°C
Typ
Low Input Offset Current
500 pA Max at T
A
= − 55°C to 125°C
A
VD
. . . 135 dB Min
CMRR . . . 120 dB Min
k
SVR
. . . 110 dB Min
Single-Supply Operation
Common-Mode Input Voltage Range
Includes the Negative Rail
No Noise Degradation With External
Capacitors Connected to V
DD −
D008, JG, OR P PACKAGE
(TOP VIEW)
C
XA
IN −
IN +
V
DD −
1
2
3
4
8
7
6
5
C
XB
V
DD +
OUT
CLAMP
D014, J, OR N PACKAGE
(TOP VIEW)
description
8
7
The TLC2652 and TLC2652A are high-precision
chopper-stabilized operational amplifiers using
FK PACKAGE
Texas Instruments Advanced LinCMOS pro-
(TOP VIEW)
cess. This process, in conjunction with unique
chopper-stabilization circuitry, produces opera-
tional amplifiers whose performance matches or
exceeds that of similar devices available today.
Chopper-stabilization techniques make possible
3 2 1 20 19
NC
18
CLK OUT
4
extremely high dc precision by continuously
NC
17
NC
5
nulling input offset voltage even during variations
IN −
6
16
V
DD +
in temperature, time, common-mode voltage, and
15
NC
NC
7
power supply voltage. In addition, low-frequency
14
OUT
8
IN +
noise voltage is significantly reduced. This high
9 10 11 12 13
precision, coupled with the extremely high input
impedance of the CMOS input stage, makes the
TLC2652 and TLC2652A an ideal choice for
low-level signal processing applications such as
strain gauges, thermocouples, and other
transducer amplifiers. For applications that
NC − No internal connection
require extremely low noise and higher usable
bandwidth, use the TLC2654 or TLC2654A
device, which has a chopping frequency of
10 kHz.
The TLC2652 and TLC2652A input common-mode range includes the negative rail, thereby providing superior
performance in either single-supply or split-supply applications, even at power supply voltage levels as low as
±
1.9 V.
Two external capacitors are required for operation of the device; however, the on-chip chopper-control circuitry
is transparent to the user. On devices in the 14-pin and 20-pin packages, the control circuitry is made accessible
to allow the user the option of controlling the clock frequency with an external frequency source. In addition, the
clock threshold level of the TLC2652 and TLC2652A requires no level shifting when used in the single-supply
configuration with a normal CMOS or TTL clock input.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Advanced LinCMOS is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
C
XB
C
XA
NC
IN −
IN +
NC
V
DD −
1
2
3
4
5
6
14
13
12
11
10
9
INT/EXT
CLK IN
CLK OUT
V
DD +
OUT
CLAMP
C RETURN
Copyright
1988−2005, Texas Instruments Incorporated
On products compliant to MIL PRF 38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
NC
VDD−
NC
C RETURN
CLAMP
V XA
V XB
NC
INT/EXT
CLK IN
1
SLOS019E − SEPTEMBER 1988 − REVISED FEBRUARY 2005
TLC2652, TLC2652A, TLC2652Y
Advanced LinCMOS PRECISION CHOPPER STABILIZED
OPERATIONAL AMPLIFIERS
description (continued)
Innovative circuit techniques are used on the TLC2652 and TLC2652A to allow exceptionally fast overload
recovery time. If desired, an output clamp pin is available to reduce the recovery time even further.
The device inputs and output are designed to withstand
±
100-mA surge currents without sustaining latch-up.
Additionally the TLC2652 and TLC2652A incorporate internal ESD-protection circuits that prevent functional
failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2; however, care should be
exercised in handling these devices, as exposure to ESD may result in degradation of the device parametric
performance.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from − 40°C to 85°C. The Q-suffix devices are characterized for operation from − 40°C to125°C.
The M-suffix devices are characterized for operation over the full military temperature range of −55°C to125°C.
AVAILABLE OPTIONS
(1)
PACKAGED DEVICES
TA
VIOmax
AT 25°C
8 PIN
SMALL
OUTLINE
(D008)
TLC2652AC-8D
TLC2652C-8D
TLC2652AI-8D
TLC2652A-8D
CERAMIC
DIP
(JG)
PLASTIC
DIP
(P)
TLC2652ACP
TLC2652CP
TLC2652AIP
TLC2652IP
SMALL
OUTLINE
(D014)
TLC2652AC-14D
TLC2652C - 14D
TLC2652AI-14D
TLC2652I-14D
14 PIN
CERAMIC
DIP
(J)
PLASTIC
DIP
(N)
TLC2652ACN
TLC2652CN
TLC2652AIN
TLC2652IN
20 PIN
CHIP
CARRIER
(FK)
CHIP
FORM
(Y)
0°C
0C
to
70°C
70 C
− 40°C
40 C
to
85°C
85 C
− 40°C
40 C
to
125°C
125 C
− 55°C
to
125°C
1
µV
3
µV
1
µV
3
µV
TLC2652Y
3.5
µV
TLC2652Q-8D
3
µV
3.5
µV
TLC2652AM-8D
TLC2652M-8D
TLC2652AMJG
TLC2652MJG
TLC2652AMP
TLC2652MP
TLC2652AM-14D
TLC2652M-14D
TLC2652AMJ
TLC2652MJ
TLC2652AMN
TLC2652MN
TLC2652AMFK
TLC2652MFK
The D008 and D014 packages are available taped and reeled. Add R suffix to the device type (e.g., TLC2652AC-8DR). Chips are tested at 25°C.
NOTE (1): For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
functional block diagram
VDD +
7
Clamp
Circuit
IN +
IN −
3
2
B
A
+
Null
DISTRIBUTION OF TLC2652
INPUT OFFSET VOLTAGE
36
5
6
CIC A
CLAMP
OUT
Percentage of Units − %
150 Units Tested From 1 Wafer Lot
32 VDD
±
=
±
5 V
TA = 25°C
28 N Package
24
20
16
12
8
4
+
B
Main
A
CXA
B
CXB
Compensation-
Biasing
Circuit
External Components
4
VDD −
8
C RETURN
0
−3
−2
−1
0
1
2
VIO − Input Offset Voltage −
µV
3
Pin numbers shown are for the D (14 pin), JG, and N packages.
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
TLC2652, TLC2652A, TLC2652Y
Advanced LinCMOS PRECISION CHOPPER STABILIZED
OPERATIONAL AMPLIFIERS
SLOS019E − SEPTEMBER 1988 − REVISED FEBRUARY 2005
TLC2652Y chip information
This chip, when properly assembled, displays characteristics similar to the TLC2652C. Thermal compression
or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
(13)
(14)
(12)
(11)
(10)
(9)
(8)
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4
×
4 MINIMUM
TJmax = 150°C
80
(1)
TOLERANCES ARE
±
10%.
ALL DIMENSIONS ARE IN MILS.
PIN (7) IS INTERNALLY CONNECTED
TO BACK SIDE OF CHIP.
FOR THE PINOUT, SEE THE FUNCTIONAL
BLOCK DIAGRAM.
(2)
(4)
(5)
(7)
90
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
3
SLOS019E − SEPTEMBER 1988 − REVISED FEBRUARY 2005
TLC2652, TLC2652A, TLC2652Y
Advanced LinCMOS PRECISION CHOPPER STABILIZED
OPERATIONAL AMPLIFIERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage V
DD +
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
Supply voltage V
DD −
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −8 V
Differential input voltage, V
ID
(see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
16 V
Input voltage, V
I
(any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
8 V
Voltage range on CLK IN and INT/EXT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DD
− to V
DD −
+ 5.2 V
Input current, I
I
(each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
5 mA
Output current, I
O
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
50 mA
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Current into CLK IN and INT/EXT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
5 mA
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T
A
: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65
°C
to 150
°C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or P package . . . . . . . . . . . . . 260
°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or JG package . . . . . . . . . . . . . . . . 300°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VDD + and VDD − .
2. Differential voltages are at IN+ with respect to IN −.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
PACKAGE
D008
D014
FK
J
JG
N
P
TA
25°C
25 C
POWER RATING
725 mV
950 mV
1375 mV
1375 mV
1050 mV
1575 mV
1000 mV
DERATING FACTOR
ABOVE TA = 25°C
5.8 mW/°C
7.6 mW/°C
11.0 mW/°C
11.0 mW/°C
8.4 mW/°C
12.6 mW/°C
8.0 mW/°C
TA = 70°C
70 C
POWER RATING
464 mW
608 mW
880 mW
880 mW
672 mW
1008 mW
640 mW
TA = 85°C
85 C
POWER RATING
377 mW
494 mW
715 mW
715 mW
546 mW
819 mW
520 mW
TA = 125°C
125 C
POWER RATING
145 mW
190 mW
275 mW
275 mW
210 mW
315 mW
200 mW
recommended operating conditions
C SUFFIX
MIN
Supply voltage, VDD
±
Common-mode input voltage, VIC
Clock input voltage
Operating free-air temperature, TA
±
1.9
VDD −
VDD −
0
MAX
±
8
VDD + − 1.9
VDD − + 5
70
I SUFFIX
MIN
±
1.9
VDD −
VDD −
−40
MAX
±
8
Q SUFFIX
MIN
±
1.9
MAX
±
8
M SUFFIX
MIN
±
1.9
MAX
±
8
VDD + − 1.9
VDD − + 5
125
UNIT
V
V
V
°C
VDD + − 1.9 VDD −
VDD − + 5 VDD −
85
−40
VDD + − 1.9 VDD −
VDD − + 5 VDD −
125
−55
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
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