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TM-056-CBF-B-A3D6K2A3

Telecom IC, MDIP18,

器件类别:无线/射频/通信    电信电路   

厂商名称:Vectron International, Inc.

厂商官网:http://www.vectron.com/

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
Objectid
108426475
包装说明
DIP, DIP18,1.6,200
Reach Compliance Code
compliant
JESD-30 代码
R-MDIP-T18
端子数量
18
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
METAL
封装代码
DIP
封装等效代码
DIP18,1.6,200
封装形状
RECTANGULAR
封装形式
IN-LINE
电源
5 V
认证状态
Not Qualified
最大压摆率
500 mA
标称供电电压
5 V
表面贴装
NO
温度等级
INDUSTRIAL
端子形式
THROUGH-HOLE
端子节距
5.08 mm
端子位置
DUAL
文档预览
TM-056
Integrated Timing Solution
The TM-056 is a compact Timing Module, which functions as a complete system clock solution for general Stratum 3/3E timing applications. The
ns
gen
TM-056 uses Vectron’s Digital and Analog Phase Locked Loop (DPLL and APLL) technology and can lock to 2 re
cked
ca
reference frequencies automatically.
om
interfa
comp
The module has dual output clocks ranging from 8 kHz to 77.76 MHz. Simple control interface with comprehensive state engine, status and
alarm indications and fully automatic operation
makes
seamless
system integration of t
TM-056 module.
eration
ation
the
m
Features
• Single module Statum 3/3E synchronization solution.
• Complies with Telcordia GR-1244/GR-253 and ITU-T G.812/G.813
recommendations.
• Supports Free-run, Holdover and Lock modes.
• Accepts 2 reference inputs from frequency range 8kHz to 77.76MHz.
• Continuously monitors and evaluates both input reference signals
simultaneously.
• Provides two synchronized outputs with frequency range up to 77.76MHz.
• On board OCXO that provides excellent stability in Freerun and Holdover
mode.
• Loop filtering utilizing DPLL.
• Automatic “hit-less” switchover on loss of input.
• Holdover mode with 90 seconds of history.
• Several alarms and status signals.
• Simple control interface and JTAG port for factory programming.
• Small dimensions 1.9” x 1.9” x 0.55”
.
• Product is compliant to RoHS directive and fully compatible with lead free
assembly.
r
m
i
l
e
Block Diagram
OCXO
DPLL
APLL
CPU
n
i
Applications
Multi-service Switches and Routers
ATM
Gateway
Access
EDGE
Core
SONET
SDH
DWDM
EX REF 1
EX REF 2
Reference
Monitor
and
Selection
Output
Dividers
OUT 1
OUT 2
CNT 1
CNT 2
HOLDOVER
REF 1
REF 2
FREERUN
ALARM
UNLOCK
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Description
The TM-056 is based on digital PLL (DPLL) that performs filtering of input signals, and complemented by an analog PLL (APLL) required to deliver
high quality output signals. The most critical element of the TM-056 is the DPLL that generates a phase-locked clock, filters jitter and wander
and suppresses input phase transients. All of these features are in agreement with international standards. The DPLL supports three mandatory
modes of operation. (Free-run, Lock and Holdover). Each of these modes places specific requirements on the building blocks of the DPLL.
In the Free-run mode, the output is locked to an internal OCXO therefore timing and synchronization signals are based on the accuracy of
cu
on-board oscillators. This mode is typically used when a master clock source is required, not valid history of data for the Holdover mode, or
dover mo
immediately following system power-up before network synchronization is achieved.
In Holdover mode, the TM-056 generates a clock based on data collected from past reference signals when the module was locked. The
e
Holdover mode is typically used when no external reference is available. The stability of the output signal in Holdover
mode depends o
the
l
of
stability of the on-board oscillator. By default TM-056 uses OCXO as an on-board oscillator but other type of oscillators are available on request.
r
tors
reques
r
In Lock mode the device can be locked to one of two external reference signals. The Lock mode is typically
used when a slave clock
source,
ly
sourc
synchronized to the network is required. In this mode, the TM-056 provides timing signals, which are synchronized to one of two references
gnals,
ynchronized
referen
inputs (i.e. REF1 or REF2). The input reference signals may have a variety of nominal frequencies, which are specifi
ed by custom
nal
s,
customers.
Both input references are continuously monitored and evaluated by the module
in terms of presence and frequency offset relative
to the local
dule
le
t
oscillator. The TM-056 rejects all reference signals that are out of the frequency range
of approximately ±17ppm. A ref
equency
ange
reference will be qualified if
b
the signal is present and within the frequency limit for more than 20s approximately.
ely.
The TM-056 dynamically changes the loop bandwidth according to the status
of the DPLL. There are th
cording
tatus
three stages fo the DPLL to be locked. The
for
first stage is frequency acquisition that runs until the frequency becomes
equal to the reference. T
second st
stage is phase acquisition that runs
e
comes
The
until a new phase reference is not determined. The
third stage is tracking when the DPLL is lo
e
locked and tra
tracks the phase reference with very low
loop bandwidth. This method with three stages
ensures a minimum locking time and
minimum phase jumps and shifts during rearrangement.
tages
ages
m
phas
The phase data is continuously collected for
history buffer during the time whe
the unit is locked to any of the input references. The history
ollected
when
buffer is actually a circular buffer in memory that
keeps valid phase data f
Holdover m
mode for the last 90 seconds of operation. When the
uffer
at
for
TM-056 enters holdover mode the data
from the buffer is validated a
additiona process. In the beginning of operation the unit has no valid
r
ta
and additionally
history buffer.
The APLL is
locked to DPLL output and provides low jit
output. Th TM-056 module provides two output signals OUT1 and OUT2. The outputs
The
L
s
jitter
are generated by APLL and scaled by the output dividers. The frequency of the APLL oscillator is specified according to an application where the
enerated
f
TM-056 will be used.
56
The J-TAG service
port is used for on
board chip programming and debugging purposes during production and testing. The port is used only by
G
rvice
factory and any
una
y
unauthorized access can da
damage the unit.
ovides
vides
The TM-056 provides a detailed m
monitoring and indications of operation mode and status of the unit. There are six digital outputs that reports
statuses and alarms of the mo
rms
module. These alarms are mainly used for communication between the module and equipment where the module is
operating.
r
P
CNT1
0
1
0
1
i
m
i
l
e
Mode of Operation
y
r
a
n
Status Indications
HOLDOVER
REF 1
REF 2
FREE-RUN
UNLOCK
ALARM
The signal is ON (logic high) when TM-056 in Holdover mode.
The signal is ON (logic high) when TM-056 in Lock mode using EX REF 1.
The signal is ON (logic high) when TM-056 in Lock mode using EX REF 2.
The signal is ON (logic high) when TM-056 in Free-run mode.
The signal in ON (logic high) when TM-056 is not locked to an external reference.
The signal is ON (logic high) when TM-056 is in Holdover of Free-run mode.
A simple control interface is
available for user to control the
operation of the TM-056. The two
external inputs CNT1 and CNT2
provide this feature. The true
table below shows behavior of the
TM-056 module according to the
control inputs states.
TM-056 Status Indications
CNT2
0
0
1
1
Mode of Operation
Free-run
Locked to EX REF1
Locked to EX REF2
Holdover
By changing the control inputs the user can change the state of the TM-056 accord-
ing to the state engine diagram. The state engine diagram of the TM-056 shows
the transients between the three operating modes: Free-run, Lock and Holdover
showed as shaded ellipse, in a changing environment. The temporary operating
states, showed as circle, are used internally until one of the three modes is reached.
Besides the control inputs (CNT1 and CNT2) certain types of inputs and statuses
affect the changes in the state engine such as the availability of external references
and change of the quality of the input reference signal beyond predefined limits.
TM-056 Mode selection
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
R e s et
(0 )
10
1
16
3
13
31
S w itch in g
(3 )
F re e -ru n
(1 )
12
32
23
21
2
H o ld o ve r
(2 )
14
TM-056 State Engine
6
36
63
34
46
26
Transition
1
2
3
4
5
6
10
12
13
14
15
16
21
23
24
25
26
31
32
34
35
36
46
54
63
64
y
r
a
n
i
m
i
l
e
r
P
Lock
(4 )
24
P re -L o c k e d
(6 )
64
15
4
35
54
25
65
P h a s e L o st
(5 )
5
Name/Description
Free-run
Holdover
Condi
Condition
Until
other conditions are not tru
til
true
Until other conditions are not true
Switching
Lock
Until other conditions are not true
conditio
Until
other c
til
conditions are not true
Phase Lost
Until other conditions are not true
conditio
Pre-Locked
Reset
Until other conditions are not true
Until the internal reset flag is not set.
th
Holdover to Free-run
n
If control sig
signals are changed to CNT0=0 and CNT1=0 or no valid Holdover history available.
Switching to Free-run
Lock to Free-run
Free-
If control
signals
are changed t CNT0=0 and CNT1=0 or selected reference is disqualified and no valid Holdover
ntrol
to
history available.
If co
control signals are changed to CNT0=0 and CNT1=0 or selected reference is disqualified and no valid Holdover
history available.
If contr signals are changed to CNT0=0 and CNT1=0 or selected reference is disqualified and no valid Holdover
control
history available.
Phase Lost to Free-run
Free-ru
Pre-Locked to Free-run
Pre-Loc
Free-run to Holdover
If control signals are changed to CNT0=0 and CNT1=0 or selected reference is disqualified and no valid Holdover
history available.
If control signals are changed to CNT0=1 and CNT1=1 and valid Holdover history available.
Switching to Holdover
Lock to Holderover
If control signals are changed to CNT0=1 and CNT1=1 or selected reference is disqualified and valid Holdover
history available.
If control signals are changed to CNT0=1 and CNT1=1 or selected reference is disqualified and valid Holdover
history available.
If control signals are changed to CNT0=1 and CNT1=1 or selected reference is disqualified and valid Holdover
history available.
If control signals are changed to CNT0=1 and CNT1=1 or selected reference is disqualified and valid Holdover
history available.
If qualified reference is selected by the control pins (CNT0 and CNT1).
If any changes occurred on the control pins (CNT0 and CNT1) during Holdover or selected reference is qualified.
If any changes occurred on the control pins (CNT0 and CNT1) during Lock.
If any changes occurred on the control pins (CNT0 and CNT1) during Phase Lost.
If any changes occurred on the control pins (CNT0 and CNT1) during Pre-Locked.
If the internal Pre-lock flag is set.
If the internal Phase Lost flag is set
Until the internal flag is not set
Until the internal flag is not set.
Phase Lost to Holdover
Pre-Locked to Holdover
Free-run to Switching
Holdover to Switching
Locked to Switching
Phase Lost to Switching
Pre-Locked to Switching
Pre-Locked to Lock
Locked to Phase Lost
Switching to Pre-Locked
Locked to Pre-Locked
65
Phase Lost to Pre-Locked
If the internal Phase Lost flag is not set
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Specifications
Parameter
Voltage
Supply Current During Warm-up
Steady State Current
Specifications
Power
+5 VDC
500mA
300mA
Notes
+3.3VDC available on request
@ 25˚C
@ 25˚C
Input Signals
Number of Input Signals
Input Reference Frequency
Signal Level
Time Reference Characteristics
Number of Output Signals
Output 1
Output 2
Signal Level Output 1
Signal Level Output 2
Phase Transient Tolerance
Wander Generation
Wander Tolerance
ransfer
Wander Transfer
MTIE
y
r
a
n
i
m
i
l
e
r
P
8kHz - 77.76MHz
LVCMOS
er
Per customer request
Telcordia: GR-1244-CORE 3.2.1. R3-1
2
Output Signals
2
up to 77.76MHz
up to 77.76MHz
MOS
LVCMOS
LVCMOS
requ
Per customer request
Per customer request
Input and Output Reference Signal Characteristics
e
Telcordia: GR-1244-CORE 3.2.1
244-CORE 3
Telcordia: GR-1244-CORE 4.2, GR-253-CORE 5.4.4.3.6
Telcordia:
GR-1244-CORE 4.4
Input Signal
Jitter Tolerance
ITU-T: G.812 Type III/IV
Telcordia: GR-1244-CORE 5.3, GR-253-CORE 5.4.4.3.2
elcordia:
GR-253-C
Telcordia: GR-1244-CORE 4.3
rdia: GR-1244
ITU-T: G.812 para 11.2 Type III/IV
ITU-T: G.825
Telcordia:
GR-1244-CO
5.4, GR-253-CO 5.4.4.2.4
a:
GR-1244-CORE
GR-253-CORE
Telcordia: GR-1244-CORE 5.3, GR
GR-1
GR-253-CORE 5.4.4.3.2
ITU-T: G.812 Type III/IV
TDEV
Telcord
GR-1244-CORE
Telcordia: GR-1244-COR 5.3, GR-253-CORE 5.4.4.3.2
Telcordia: GR-124
GR-1244-CORE 5.6, GR-253-CORE 5.4.4.3.3
Telcordi GR-1244-CORE 5.5, GR-253-CORE 5.6.2.3
Telcordia:
Phase Transient
Jitter Generation
ter
Jitte
Jitter Transfer
T
Telcordia: GR-1244-CORE 5.5, GR-253-CORE 5.6.2.1
DPLL Performance
±4.6ppm
Free Run Accuracy
Holdov
Holdover Stability
Pull in Range
Lock Time
GR-1244-CORE 5.1
±3.6x10-7 (Stratum 3)
±17ppm
GR-1244-CORE 5.2
GR-1244-CORE 3.5
100s (Stratum 3)
≤1x10-11
GR-1244-CORE 3.5
Average 24h
Lock Accuracy
General
Mechanical
Operating Temperature
Local Oscillator
1.9” x 1.9” x 0.52” (48.26 x 48.26 x 13.28 mm)
0 to 70°C
OCXO
18 pin package, RoHS compliant
-40 to 85°C option available
TCXO option available
Absolute Maximum/Minimum Rating
Symbol Parameter
V
CC
V
IN
T
STG
Storage Temperature
Supply Voltage
Min
-0.5
Nom
+7.0
Max
+7.0
V
CC
+0.5
-70 +155
Unit
V
V
C
Notes
1
1
1
Note 1: Stresses beyond those listed under Absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions are not implied.
Exposure to Absolute Max Rating conditions for extended periods of time may affect device reliability.
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Performance
The following paragraph shows typical TM-056 performances. The measurements were performed in according to Telcordia GR-1244-CORE
recommendation using a system that emulates standard timing configuration in network equipment. For more details please contact the factory.
T D E V C lo ck, G R -1244-C O R E : W and er T o leran ce
1000
10
0
TM-056 typical performance - Wander Generation MTIE GR-
1244-CORE
TD E V C lock, G R -1244-C O R E : W ander G eneratio n
100
TD E V [ns]
0.01
0.1
6
ypical
performance - Wander Generation TDEV GR-
TM-056 typical
p
1244-CORE
y
r
a
n
i
m
i
l
e
r
P
T D E V [n s]
10
1
0.0
1
0.1
1
10
1
10
0
1000
01
0.1
O b serv atio
n In terv
al
erv
[sec]
c]
1000
00
TM-056 typical performance - Wander Tolerance TDEV GR-
M-056
Wa
Toleranc
1244
1244-CORE
1μs T
T ran sien t
R
R esp o n se
1μs
ran sien t esp o n se
es
1200
1200
1000
1000
10
800
800
600
600
1
1
10
100
0
1000
10000
100
100000
0
0000
TIE [ns]
TIE [ns]
s]
400
400
01
0.1
200
200
0
0
50
50
55
55
60
60
65
65
70
70
75
75
80
80
85
85
90
90
95
95
100
100
0.0
1
-2 0 0
-2 0 0
O bservatio n Inter val
rvatio
[sec]
]
T im e [s ]
T im e [s ]
TM-056 typical performance - 1µs Transient Response TIE
Mechanical Dimensions
Soldering Information
1.900 48.26
1.900 48.26
The TM-056 can be soldered to the main board in following
ways:
1.
Wave soldering machine - using no cleaning
material.
2.
Manual soldering - max. Temperature is 370°C,
for 2 seconds, using no clean soldering material.
TM-056 Outline Drawings
.606 15.39
.060 1.52
PIN 1
.200 5.08
.025 0.64
.160 4.06
1.600 40.64
.150 3.81
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
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