TS391, TS391A
Datasheet
Low-power single voltage comparator
Features
•
•
SOT23-5
DFN8 2x2
•
•
•
•
•
•
•
Wide single supply voltage range or dual supplies 2 V to 36 V or ± 1 V to ± 18 V
Very low supply current (0.2 mA) independent of supply voltage
(1 mW / comparator at 5 V)
Low input bias current: 25 nA typ.
Low input offset current: ± 5 nA typ.
Low input offset voltage: ± 2 mV max. for TS391A
Input common-mode voltage range includes ground
Low output saturation voltage: 250 mV typ. (I
o
= 4 mA)
Differential input voltage range equal to the supply voltage
TTL, DTL, ECL, CMOS compatible outputs
Description
These devices consist of a low-power voltage comparator designed specifically to
operate from a single supply over a wide range of voltages. Operation from split
power supplies is also possible.
These comparators also have a unique characteristic where the input common-mode
voltage range includes ground, even though operated from a single power supply
voltage.
Maturity status link
TS391, TS391A
DS1551
-
Rev 10
-
January 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
TS391, TS391A
Schematic diagram
1
Schematic diagram
Figure 1.
Schematic diagram
V
CC
3.5 µA
100 µA
3.5 µA
100 µA
Non-inverting
input
V
CC
Inverting
input
V
CC
V
O
V
CC
DS1551
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Rev 10
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TS391, TS391A
Package pin connections
2
Package pin connections
Figure 2.
Pin connections (top view)
TS391, TS391A
TS391R
OUT
VCC-
IN-
1
2
3
5
VCC+
IN-
VCC-
1
2
3
5
VCC+
4
IN+
IN+
4
OUT
SOT23-5
SOT23-5
TS391
1
8
7
6
5
E+
E-
VCC-
2
3
4
VCC+
Out
DFN8 2x2
DS1551
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Rev 10
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TS391, TS391A
Absolute maximum ratings and operating conditions
3
Absolute maximum ratings and operating conditions
Table 1.
Absolute maximum ratings (AMR)
Symbol
V
CC
V
id
V
i
V
o
Supply voltage
Differential input voltage
Input voltage
Output voltage
(1)
Output short-circuit to ground
(2)
T
j
T
stg
R
thja
Maximum junction temperature
Storage temperature range
Thermal resistance junction to ambient
(3)
Human body model (HBM)
(4)
ESD
Machine model (MM)
(5)
Charged device model (CDM)
(6)
1. Output voltage can be set up to 36 V even if the V
CC
is lower.
2. Short-circuits from the output to V
CC +
can cause excessive heating and potential destruction. The maximum output current
is approximately 20 mA independent of the magnitude of V
CC +
.
3. Short-circuits can cause excessive heating. These values are typical.
4. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor
between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.
5. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the
device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations
while the other pins are floating.
6. Charged device model: all pins and package are charged together to the specified voltage and then discharged directly to
ground through only one pin. This is done for all pins.
SOT23-5
DFN8 2x2
Parameter
Value
±18 or 36
±36
-0.3 to 36
36
Infinite
150
-65 to 150
250
57
1500
100
1000
V
°C
V
Unit
°C/W
Table 2.
Operating conditions
Symbol
V
CC
V
icm
T
oper
Supply voltage
Input common mode voltage range
(1)
Operating free-air temperature range
T
amb
= 25 °C
T
min
≤ T
amb
≤ T
max
Parameter
Value
2 to 36 or ±1 to ±18
0 to (V
CC +
) - 1.5
0 to (V
CC +
) - 2
-40 to 125
°C
V
Unit
1. The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3 V. The
upper end of the common-mode voltage range is (V
CC +
) – 1.5 V, but either or both inputs can go to 30 V without damage.
DS1551
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TS391, TS391A
Electrical characteristics
4
Electrical characteristics
Table 3.
V
CC +
= 5 V, V
CC -
= 0 V, T
amb
= 25 °C (unless otherwise specified)
Symbol
TS391
V
io
TS391A
Parameter and test conditions
Input offset voltage
Input offset voltage, T
min
≤ T
amb
≤ T
max
Input offset voltage
(1)
Input offset voltage, T
min
≤ T
amb
≤ T
max
Input bias current
Input bias current, T
min
≤ T
amb
≤ T
max
Input bias current
(2)
Input bias current, T
min
≤ T
amb
≤ T
max
5
25
25
1
Min.
Typ.
1
Max.
5
9
1.5
2
250
400
150
250
50
150
50
200
0.2
0.5
0.5
mA
1.25
V
CC +
6
16
250
400
700
0.1
1
1.3
300
V
mA
mV
nA
µA
µs
ns
V/mV
nA
mV
Unit
TS391
I
ib
TS391A
I
io
A
VD
I
CC
V
id
I
sink
V
OL
Input offset current
Input offset current, T
min
≤ T
amb
≤ T
max
Large signal voltage gain, (V
CC +
) = 15 V, R
L
=15 kΩ, V
ο
= 1 tο 11 V
Supply current (V
CC +
) = 5 V, no load
Supply current (V
CC +
) = 30 V, no load
Differential input voltage
(3)
Output sink current, V
id
= -1 V, V
o
= 1.5 V
Low level output voltage, V
id
= 1 V, V
CC +
= V
o
= 30 V
I
OH
t
re
t
rel
High level output current, V
id
= 1 V, V
CC +
= V
o
= 30 V
Small signal response time, R
L
= 5.1 kΩ to (V
CC + )
(4)
Large signal response time, V
i
= TTL, V
ref
= 1.4 V, R
L
= 5.1 kΩ to
V
CC +
1. At the output switch point, V
o
≈ 1.4 V, R
S
= 0 Ω with (V
CC +
) from 5 V to 30 V, and over the full input
common-mode range (0 V to (V
CC +
) – 1.5 V).
2. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially
constant, independent of the state of the output, so there is no load charge on the reference of input lines.
3. Positive excursions of the input voltage may exceed the power supply level. As long as the other voltage
remains within the common-mode range, the comparator will provide a proper output state. The low input
voltage state must not be less than –0.3 V (or 0.3 V below the negative power supply, if used)
4. The response time specified is for a 100 mV input step with 5 mV overdrive. For larger overdrive signals,
300 ns can be obtained.
DS1551
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Rev 10
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