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TS83102G0CGL

A/D Converter,

器件类别:模拟混合信号IC    转换器   

厂商名称:Atmel (Microchip)

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
Atmel (Microchip)
包装说明
,
Reach Compliance Code
compliant
文档预览
Released under NDA
TS83102G0
MAIN FEATURES
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10-bit resolution.
2 GSPS sampling rate.
3 GHz full power input bandwidth.
Band flatness:
±
0.2 dB (from DC up to 1.5 GHz).
Very low input VSWR : 1.15 max from DC to 2GHz (packaged device).
Phase error: 0.2° (from 750MHz to 1.5GHz)
Power consumption : 4.6 W.
SFDR= 59 dBc ; 7.6 Effective Bits @F
S
= 1.4 GSPS, F
IN
= 700 MHz [-1dBFS].
SFDR = 52dBc ; 7.2 Effective Bits @Fs = 1.4 GSPS, F
IN
= 1950 MHz [-1dBFS].
SFDR= 56 dBc ; 6.4 Effective Bits @F
S
= 2 GSPS, F
IN
= 950 MHz [-1dBFS].
DNL =
±1.1
LSB, INL =
±2.3
LSB.
Low Bit Error Rate (10
-12
) @ 2 GSPS and Tj = 110°C
500 mVpp differential 100Ω or single-ended 50Ω
(±1 %)
analog inputs.
Differential 100Ω or single-ended 50Ω ECL compatible clock inputs.
ECL or LVDS output compatibility.
50Ω differential outputs with common mode independent on temperature.
Data ready output with asynchronous reset.
Out-of-Range output bit.
Gray or Binary selectable output data ; NRZ output mode.
Pattern generator output (for acquisition system monitoring).
ADC gain adjust.
Sampling delay adjust.
Offset control capability.
Radiation tolerance oriented design (more than 100Krad (Si) expected).
ADC 10-bit 2 Gsps
Converter
TS83102G0
APPLICATION
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Direct RF down conversion.
Wide band satellite receiver.
High speed instrumentation.
High speed acquisition systems.
High energy physics.
Automatic test equipment.
1/ CBGA148 down
TS83102G0CGL
2/ Die form : JTS83102G0
3/ Hermetic ceramic package :
to be defined on request
4/ DMUX 10 bit 1:4/1:8 2Gsps
TS81102G0 :
Companion device available
5/ CBGA package Evaluation
Board TSEV83102G0GL
SCREENING
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Standard die flow
Package Temperature range : To be defined
DESCRIPTION
The TS83102G0 is a monolithic 10-bit analog-to-digital converter, designed for digitizing
wide bandwidth analog signals at very high sampling rates of up to 2 Gsps.
The TS83102G0 is using an innovative architecture, including an on-chip Sample and
Hold (S/H), and is fabricated with an advanced high speed bipolar SiGe heterojunction
process, featuring 75GHz cutoff frequency.
The 3 GHz full power input bandwidth and the band flatness performances enables the
digitizing of high IF and large bandwidth signals.
CBGA 148 Packaged device
January 2002
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