U3761MB-T
Universal Telephone IC – All Functions Integrated
Description
Atmel Wireless & Microcontrollers’ low-voltage
telephone circuit U3761MB-T performs all the speech
and line interface functions required in an electronic
telephone set, the tone ringer, the pulse and DTMF dialing
with redial, notice function, and 13 memories. Operation
below 15 mA is possible with reduced performance.
Electrostatic sensitive device.
Observe precautions for handling.
Features
Speech Circuit
D
Adjustable DC characteristic
D
Symmetrical input of microphone amplifier
D
Receiving amplifier for dynamic or
piezo-electric earpieces
D
Automatic line-loss compensation
D
Ten by 17 digits indirect (two-touch) memory
D
Notice function up to 32 digits
D
Standard low-cost crystal 3.58 MHz or
ceramic resonator
D
Handset Mute (Privacy) with optical indication
D
Additional toggle flipflop
D
Internal loop interrupt detection
Dialer
D
DTMF / pulse switchable
D
Pulse dialing 66/33 or 60/40 or DTMF dialing
selectable by pin
D
Selectable flashing duration by key pad
D
Pause function
D
Optical indication of temporary DTMF mode
D
Keytone for pulse dialing
D
Last number redial up to 32 digits
D
Three by 17 digits direct (one-touch) memory
Tone Ringer
D
2-tone ringer
D
Adjustable volume
D
RC oscillator
D
Adjustable threshold
Benefits
D
Low number of external components
D
High quality through one IC solution
Ordering Information
Extended Type Number
U3761MB-TFN
U3761MB-TFNG3
Package
SSO44
SSO44
Tube
Taped and reeled
Remarks
Rev. A3, 06-Mar-01
1 (26)
U3761MB-T
Tip
Block Diagram / Applications
2 (26)
VI
100 k
W
HKS 1a
470
W
5 M
W
3 k
W
HKS 1b
75 V
Ring
33 k
W
220 k
W
Next to VDD
and GND
220
mF
18 k
W
220 nF
220 nF
2N5401
CL
2.2 nF
XT
2.2
m
F
CLIM
VL
HKS
MODE
PRIND
Mask
DP
VDD
MFO
MIC1
MIC2
MICO
TIN
13 V/
1W
MPSA42
LED
4.7 V
470 nF
1
m
F
1 k
W
3.58 MHz
to key
board
matrix
XT
Clock
generator
–
+
Micro–
phone
amplifier
Control
function
Sidetone
amplifier
ST
2.4 k
W
Transmit
amplifier
*/T 0
Important note:
Application examples have not been examined for series
use or reliability, and no worst case scenarios have been
developed. Customers who adapt any of these proposals
must carry out their own testing and be convinced that no
negative consequences arise from the proposals.
680
W
330
W
Earth
KT
Mute
control
3.3 nF
C1
C2
Pulse
control
logic
C3
Receiver
attenuation
RECIN
2.2
m
F
47 nF
C4
Read – write
counter
Supply
current
regulator
Control
function
Control
logic
R1
1
2
3
S M1
Receiving
amplifier
RECO1
1.8 k
W
100
W
RECO2
12 k
W
AGC
RDC
VI
39
W
1W
100
m
F
300
W
R2
4
5
6
M2
R3
Key–
board
inter–
face
RAM
7
8
9
A M3
R4
# R/P N
Figure 1. Block diagram / applications
Location
latch
Data
latch &
decoder
D /A
converter
ROW & column
programmable
counter
AGC
current
generator
Supply
Power on reset
Clock signal
oscillator
Divider
Tone signal
generator
Divider
Bandgap
reference
Comparator
with hysteresis
F1 F2 F3 E
VI
MFIND
4.7 V
MUTE
VRING
10
m
F
10 k
W
OUT
TEST
1 nF
RCK
150 k
W
VRIAC
10 k
W
THA
HFI
Rev. A3, 06-Mar-01
HFO
Toggle
flipflop
U3761MB-T
Pin Description
C1 1
C2 2
C3 3
C4 4
Earth
HFI
5
6
44
43
42
41
40
39
38
37
U3761MB-T
XT 9
MFO 10
MFIND 11
GND 12
MIC 1 13
MIC 2 14
MICO 15
VL 16
RDC 17
TIN 18
VI 19
MUTE 20
PRIND 21
RECIN 22
36
35
34
33
32
HKS
n.c.
TEST
VDD
OUT
R4
R3
R2
R1
Mask
DP
MODE
KT
HFO 7
XT 8
31 RCK
30 VRING
29 VRIAC
28
AGC
27 THA
26 ST
25
24
23
Figure 2. Pinning SSO44
CLIM
RECO 1
RECO 2
Rev. A3, 06-Mar-01
3 (26)
U3761MB-T
Pin
1
2
3
4
5
Symbol
C1
C2
C3
C2–C4
Function
Keyboard input
C1
Configuration
VDD
PD
VDD
C4
Earth
Earth key ( 604 ms high pulse, 1 s pause)
EARTH
PD =
Protection Device
VDD
6
HFI
VDD
PD
7
HFO
Output will be toggled by each LOW/ HIGH
edge at HFI.
VDD
HFO
PD
8
9
XT
XT
PD
VDD
PD
10
MFO
PD
4 (26)
Rev. A3, 06-Mar-01
Ê
MFO
Ê
Ê
Output of DTMF
DTMF output frequency
Specified (Hz)Actual (Hz)Error (%)
R
1
697
699
+0.28
770
766
–0.52
R
2
R
3
852
848
–0.47
R
4
941
940
–0.10
C
1
1209
1216
+0.57
C
2
1336
1332
–0.30
C
3
1477
1472
–0.34
VDD
ÊÊ
XT
ÊÊ
A built-in inverter provides oscillation with an
inexpensive 3.579545-MHz crystal or ceramic
resonator
VDD
XT
VDD
VDD
VDD
200K
Toggle flipflop input
Input with 200 kW pull-down resistor.
HFI triggers HFO with each LOW/ HIGH
edge.
VDD
HFI
Ê
Ê
Ê
Ê
Ê
Ê
Ê
Ê
Ê
Ê
VDD
VDD
PD
U3761MB-T
11
MFIND
Output switches to low being in temporary
DTMF mode. Reset by on hook condition.
Maximum voltage at MFIND = 5.5 V.
MFIND
12
13
GND
MIC 1
Ground
Inverting input of microphone amplifier
VI
14
MIC 2
Non-inverting input of microphone amplifier
50K
1V
MIC1
MIC2
50K
1V
MICO
PD
16
VL
Positive supply voltage input to the device.
The current through this pin is modulated by
the transmit signal.
VL
PD
16V
RDC
17
RDC
An external resistor (1 W) is required from
this pin to GND to control the DC input im-
pedance of the circuit. It has a nominal value
of 39
W
for low-voltage operation. Values up
to 100
W
may be used to increase the avail-
able transmit output voltage swing at the ex-
pense of low-voltage operation.
Input to the line output driver amplifier.
Transmit AGC applied to this stage.
AGC
PD
RDC
5.6K
TIN
PD
16V
Rev. A3, 06-Mar-01
Ê
Ê
18
TIN
Ê Ê
ÊÊ
15
MICO
Transmit pre-amp output which is normally
capacitively coupled to Pin TIN
1V
5 (26)
Ê
Ê
Ê
Ê
Ê
Ê
Pin
Symbol
Function
Configuration
VDD
MFIND
PD
PD
VI
PD
VI
1V
16K
PD
VL
PD
