DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUITS
µ
PC2709TB
5 V, SUPER MINIMOLD SILICON MMIC
MEDIUM OUTPUT POWER AMPLIFIER
DESCRIPTION
The
µ
PC2709TB is a silicon monolithic integrated circuits designed as 1st IF amplifier for DBS tuners. This IC is
packaged in super minimold package which is smaller than conventional minimold.
The
µ
PC2709TB has compatible pin connections and performance to
µ
PC2709T of conventional minimold
version. So, in the case of reducing your system size,
µ
PC2709TB is suitable to replace from
µ
PC2709T.
These IC is manufactured using NEC’s 20 GHz f
T
NESAT™III silicon bipolar process. This process uses silicon
nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and
prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.
FEATURES
• High-density surface mounting : 6-pin super minimold package (2.0
×
1.25
×
0.9 mm)
• Wideband response
• Medium output power
• Supply voltage
• Power gain
• Port impedance
: f
u
= 2.3 GHz TYP. @3 dB bandwidth
: P
O (sat)
= +11.5 dBm@f = 1 GHz with external inductor
: V
CC
= 4.5 to 5.5 V
: G
P
= 23 dB TYP. @f = 1 GHz
: input/output 50
Ω
APPLICATIONS
• 1st IF amplifiers in DBS converters
• RF stage buffer in DBS tuners, etc.
ORDERING INFORMATION
Part Number
Package
6-pin super minimold
Marking
C1E
Supplying Form
Embossed tape 8 mm wide.
1, 2, 3 pins face the perforation side of the tape.
Qty 3 kpcs/reel.
µ
PC2709TB-E3
Remark
To order evaluation samples, please contact your local NEC sales office (Part number for sample order:
µ
PC2709TB).
Caution Electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P12653EJ3V0DS00 (3rd edition)
Date Published November 2000 N CP(K)
Printed in Japan
The mark
shows major revised points.
©
1997, 2000
µ
PC2709TB
PIN CONNECTIONS
Pin No.
Pin Name
INPUT
GND
GND
OUTPUT
GND
V
CC
(Top View)
3
2
1
(Bottom View)
4
5
6
4
5
6
3
2
1
1
2
3
4
5
6
PRODUCT LINE-UP OF 5 V-BIAS SILICON MMIC MEDIUM OUTPUT POWER AMPLIFIER
(T
A
= +25°C, V
CC
= V
out
= 5.0 V, Z
S
= Z
L
= 50
Ω
)
f
u
(GHz)
2.9
P
O (sat)
(dBm)
+10.0
G
P
(dB)
15
NF
(dB)
6.5
@f = 1 GHz
5
@f = 1 GHz
3.5
@f = 0.5 GHz
6.0
@f = 1 GHz
I
CC
(mA)
26
6-pin super minimold
6-pin minimold
25
6-pin super minimold
6-pin minimold
22
6-pin super minimold
6-pin minimold
25
6-pin super minimold
C2L
C1F
C1E
C1E
Part No.
Package
6-pin minimold
Marking
µ
PC2708T
µ
PC2708TB
µ
PC2709T
µ
PC2709TB
µ
PC2710T
µ
PC2710TB
µ
PC2776T
µ
PC2776TB
2.7
+8.5
23
1.0
+13.5
33
2.3
+11.5
23
C1D
Remark
Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail.
Caution The package size distinguishes between minimold and super minimold.
2
Data Sheet P12653EJ3V0DS00
µ
PC2709TB
SYSTEM APPLICATION EXAMPLE
EXAMPLE OF DBS CONVERTERS
BS Antenna (DBS ODU)
RF Amp.
Parabola
Antenna
Mixer
IF Amp.
To IDU
µ
PC2709TB
Oscillator
EXAMPLE OF 900 MHz BAND, 1.5 GHz BAND DIGITAL CELLULAR TELEPHONE
RX
I
Q
DEMOD.
PLL
SW
PLL
I
Driver
TX
PA
F/F
0
°
×
2
µ
PC2709TB
90
°
Q
Data Sheet P12653EJ3V0DS00
3
µ
PC2709TB
PIN EXPLANATION
Applied
Voltage
(V)
−
Pin
Voltage
Note
(V)
1.05
Pin
No.
1
Pin
Name
INPUT
Function and Applications
Internal Equivalent Circuit
Signal input pin. A internal
matching circuit, configured with
resistors, enables 50
Ω
connec-
tion over a wide band.
A multi-feedback circuit is de-
signed to cancel the deviations of
h
FE
and resistance.
This pin must be coupled to sig-
nal source with capacitor for DC
cut.
Signal output pin. The inductor
must be attached between V
CC
and output pins to supply current
to the internal output transistors.
4
OUTPUT
Voltage
as same
as V
CC
through
external
inductor
4.5 to 5.5
−
6 V
CC
4 OUT
IN 1
6
V
CC
−
Power supply pin, which biases
the internal input transistor.
This pin should be externally
equipped with bypass capacitor
to minimize its impedance.
Ground pin. This pin should be
connected to system ground with
minimum inductance. Ground
pattern on the board should be
formed as wide as possible.
All the ground pins must be con-
nected together with wide ground
pattern to decrease impedance
defference.
3
GND
2 5
GND
2
3
5
GND
0
−
Note
Pin voltage is measured at V
CC
= 5.0 V
4
Data Sheet P12653EJ3V0DS00
µ
PC2709TB
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Total Circuit Current
Power Dissipation
Symbol
V
CC
I
CC
P
D
Conditions
T
A
= +25°C, Pin 4 and 6
T
A
= +25°C
Mounted on double copper clad 50
×
50
×
1.6 mm
epoxy glass PWB (T
A
= +85°C)
Ratings
6
60
270
−40
to +85
−55
to +150
T
A
= +25°C
+10
Unit
V
mA
mW
Operating Ambient Temperature
Storage Temperature
Input Power
T
A
T
stg
P
in
°C
°C
dBm
RECOMMENDED OPERATING RANGE
Parameter
Supply Voltage
Symbol
V
CC
MIN.
4.5
−40
TYP.
5.0
MAX.
5.5
Unit
V
Remark
The same voltage should be applied to pin
4 and 6.
Operating Ambient Temperature
T
A
+25
+85
°C
ELECTRICAL CHARACTERISTICS (T
A
= +25°C, V
CC
= V
out
= 5.0 V, Z
S
= Z
L
= 50
Ω
)
Parameter
Circuit Current
Power Gain
Saturated Output Power
Noise Figure
Upper Limit Operating Frequency
Isolation
Input Return Loss
Output Return Loss
Gain Flatness
Symbol
I
CC
G
P
P
O (sat)
NF
f
u
ISL
RL
in
RL
out
∆G
P
Test Conditions
No input signal
f = 1 GHz
f = 1 GHz, P
in
= 0 dBm
f = 1 GHz
3 dB down below flat gain at f = 0.1 GHz
f = 1 GHz
f = 1 GHz
f = 1 GHz
f = 0.1 to 1.8 GHz
MIN.
19
21.0
+9.0
−
2.0
26
7
7
−
TYP.
25
23.0
+11.5
5.0
2.3
31
10
10
±1.0
MAX.
32
26.5
−
6.5
−
−
−
−
−
Unit
mA
dB
dBm
dB
GHz
dB
dB
dB
dB
Data Sheet P12653EJ3V0DS00
5
嵌入式系统
