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DATA SHEET

MOS INTEGRATED CIRCUIT

PD16681A

LCD CONTROLLER/DRIVER FOR DOT MATRIX DISPLAY OF JIS LEVEL 1

AND JIS LEVEL 2 KANJI SETS

DESCRIPTION

The

PD16681A is a single-chip controller driver that can display Japanese text; including JIS Level 1 kanji, JIS

Level 2 kanji, hiragana, and katakana. Each chip can display up to four lines containing up to eight full width

characters (11 x 12 dots), or up to four lines containing up to 16 half width characters (5 x 12 dots), as well 96

pictographs.

FEATURES

•

LCD controller/driver for dot matrix display of JIS Level 1 and JIS Level 2 kanji sets

•

On-chip ROM for character generation

−JIS

Level 1 + Level 2 kanji (11 x 12 dots) : 6,355 characters

−JIS

non-kanji characters (11 x 12 dots) : 453 characters

−Other

characters (symbols, etc.) (11 x 12 dots): 256 characters

−Half

width alphanumeric characters (5 x 12 dots) : 192 characters

•

On-chip RAM for character generation

−8

types (12 x 13 dots)

•

On-chip boost circuit : switchable between 3x and 4x modes

•

RAM for pictograph data displays : 96 bits

•

Outputs : 96 segments, 52 commons

•

Duty settings : 1/39 or 1/52

•

Switchable data inputs : serial or 8-bit parallel

•

On-chip divider resistor

•

Selectable bias settings (1/8 bias, 1/7 bias, or 1/6 bias)

•

On-chip oscillation circuit

ORDERING INFORMATION

Part number

Package

Wafer

Chip (COG compliant)

ROM code

Standard

PD16681A-001

PD16681AP-001

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

Document No.

S14207EJ2V0DS00 (2nd edition)

Date Published March 2000 NS CP(K)

Printed in Japan

The mark

shows major revised points.

1999,2000

PD16681A

1. BLOCK DIAGRAM

OSC

OUT

OSC

/RESET

Oscillation Circuit

SEG

INV

COM

INV

LCD

Index

Control

Common

Driver

Display Data RAM

COM

to COM

PCOM

,PCOM

Timing Generator

OSC

BRI

STB

E/SCK

/DATA

to D

TEST

OUT

I/O

Buffer

RAM Address

Counter

96 bits

Shift

96 bits

Latch

Circuit

Segment

Driver

SEG

to SEG

RAM Data

Address Formation Circuit

Full-width

Character

Generator

ROM

Half-width

Character

Generator

ROM

Pictograph

Data RAM

Character

Generator

RAM

Display Attribute Control Circuit

CHA

D/A

Converter

Cursor Control

Circuit

DC/DC

Converter

OP Amp.

LCD Voltage Generator

Parallel/Serial Conversion Circuit

Smooth Scroll Control Circuit

, C

−

, C

−

EXT

−

AMP

IN(+)

AMP

IN(−)

AMP

CHA

LC1

LC2

LC3

LCBS1

LCBS2

LCBS3

LC4

LC5

AMP

OUT

Remark

/xxx indicates active low signals.

Data Sheet S14207EJ2V0DS00

PD16681A

2. PIN CONFIGURATION (Pad Layout)

Chip size : 2.80 x 10.48 mm

241

219

218

107

108

Data Sheet S14207EJ2V0DS00

PD16681A

Table 2-1. Pad Layout

PAD

No.

Pin Name

DUMMY1

LCBS1

LCBS2

LCBS3

AMP

OUT

AMP

OUT

AMP

IN(−)

AMP

IN(−)

AMP

IN(+)

AMP

IN(+)

LC5

LC4

LC3

LC2

LC1

LCD

X (

−1273

Y (

4800

4680

4560

4440

4320

4200

4080

3960

3840

3720

3600

3480

3360

3240

3120

3000

2880

2760

2640

2520

2400

2280

2160

2040

1920

1800

1680

1560

1440

1320

1200

1080

960

840

720

600

480

360

240

120

−120

−240

−360

−480

−600

−720

−840

−960

−1080

−1200

−1320

−1440

−1560

−1680

−1800

−1920

−2040

−2160

−2280

PAD

No.

100

101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

Pin Name

CHA

AMP

CHA

SEG

INV

COM

INV

OSC

OUT

OSC

BRI

/DATA

STB

E/SCK

/RESET

TEST

OUT

DUMMY2

DUMMY3

DUMMY4

DUMMY5

COM

DUMMY6

DUMMY7

DUMMY8

COM

DUMMY9

PCOM

SEG

X (

−1273

−1120

−1030

−940

−850

−760

−670

−580

−490

−400

−310

−220

−130

−40

140

230

320

410

500

590

680

770

860

950

1040

1273

Y (

−2400

−2520

−2640

−2760

−2880

−3000

−3120

−3240

−3360

−3480

−3600

−3720

−3840

−3960

−4080

−4200

−4320

−4440

−4560

−4680

−4800

−4920

−5113

−4905

−4815

−4725

−4635

−4545

−4455

−4365

−4275

−4185

−4095

−4005

−3915

−3825

PAD

No.

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

141

142

143

144

145

146

147

148

149

150

151

152

153

154

155

156

157

158

159

160

161

162

163

164

165

166

167

168

169

170

171

172

173

174

175

176

177

178

179

180

Pin Name

SEG

X (

1273

Y (

−3735

−3645

−3555

−3465

−3375

−3285

−3195

−3105

−3015

−2925

−2835

−2745

−2655

−2565

−2475

−2385

−2295

−2205

−2115

−2025

−1935

−1845

−1755

−1665

−1575

−1485

−1395

−1305

−1215

−1125

−1035

−945

−855

−765

−675

−585

−495

−405

−315

−225

−135

−45

135

225

315

405

495

585

675

765

855

945

1035

1125

1215

1305

1395

1485

1575

PAD

No.

181

182

183

184

185

186

187

188

189

190

191

192

193

194

195

196

197

198

199

200

201

202

203

204

205

206

207

208

209

210

211

212

213

214

215

216

217

218

219

220

221

222

223

224

225

226

227

228

229

230

231

232

233

234

235

236

237

238

239

240

241

Pin Name

SEG

COM

DUMMY10

DUMMY11

DUMMY12

COM

PCOM

DUMMY13

X (

1273

950

860

770

680

590

500

410

320

230

140

−40

−130

−220

−310

−400

−490

−580

−670

−760

−850

−940

−1030

Y (

1665

1755

1845

1935

2025

2115

2205

2295

2385

2475

2565

2655

2745

2835

2925

3015

3105

3195

3285

3375

3465

3555

3645

3735

3825

3915

4005

4095

4185

4275

4365

4455

4545

4635

4725

4815

4905

4995

5113

−

DD1

DD2

EXT

Data Sheet S14207EJ2V0DS00

PD16681A

3. PIN FUNCTIONS

3.1 Power Supply System Pins

Pin Symbol

Pin Name

Logic power supply pin

Boost circuit power supply

Logic ground

Driver ground

LCD

Driver power supply pins

29-31

−

Power supply pins for driver. Output pin for internal boost circuit.

Connect a 1-

F capacitor between these pins and the V

pins

for boosting.

If not using the internal boost circuit, a direct driver power supply

can be input.

LC1

- V

LC5

Reference power supply

pins for driver

14-28

−

These are reference power supply pins for the LCD driver.

Leave these pins open if an internal bias has been selected.

Connect a capacitor to ground.

When selecting an internal bias, the bias value can be changed

connecting these pins outside of the IC.

These are capacitor connection pins for the boost circuit.

Connect a 1-

F capacitor.

55-59

−

Ground pins for logic and driver circuit

Pad No.

50-54

I/O

−

Description

Power supply pins for logic and boost circuit

LCBS1

- V

LCBS3

Bias value setting pins

, C

2-7

32-49

−

Capacitor connection pins

Data Sheet S14207EJ2V0DS00

型号	UPD16681A-001	UPD16681AP-001
描述	Dot Matrix LCD Driver, 51 X 96 Dots, CMOS, WAFER	Dot Matrix LCD Driver, 51 X 96 Dots, CMOS, DIE-241
是否Rohs认证	不符合	不符合
厂商名称	NEC(日电)	NEC(日电)
零件包装代码	WAFER	DIE
Reach Compliance Code	compliant	compliant
最大时钟频率	0.56 MHz	0.56 MHz
显示配置	51 X 96 DOTS	51 X 96 DOTS
JESD-30 代码	X-XUUC-N	R-XUUC-N241
JESD-609代码	e0	e0
最高工作温度	85 °C	85 °C
最低工作温度	-40 °C	-40 °C
封装主体材料	UNSPECIFIED	UNSPECIFIED
封装形状	UNSPECIFIED	RECTANGULAR
封装形式	UNCASED CHIP	UNCASED CHIP
峰值回流温度（摄氏度）	NOT SPECIFIED	NOT SPECIFIED
认证状态	Not Qualified	Not Qualified
最大供电电压	4 V	4 V
最小供电电压	2 V	2 V
表面贴装	YES	YES
技术	CMOS	CMOS
温度等级	INDUSTRIAL	INDUSTRIAL
端子面层	TIN LEAD	TIN LEAD
端子形式	NO LEAD	NO LEAD
端子位置	UPPER	UPPER
处于峰值回流温度下的最长时间	NOT SPECIFIED	NOT SPECIFIED
uPs/uCs/外围集成电路类型	DISPLAY CONTROLLER, DOT MATRIX LCD DRIVER	DISPLAY CONTROLLER, DOT MATRIX LCD DRIVER