New generation Gate Array with large scale embedded SRAM
CMOS-12M
CMOS-12M is NEC Electronics’ new generation Gate Array with embedded high-density SRAMs and analog
PLLs. This product offers low price, quick design turnaroundtime and quick manufacturing turnaroundtime.
CMOS-12M enables the integration of large size SRAM modules and is capable of supporting up to 2.6 Mb of
embedded SRAM.
Characteristics
Many master slice options
Ten master slices (
μ
PD66201 to 66210) are available to support different types of design configurations. The
largest embedded SRAM product supports 1.6 M gates and 2.6 Mb of SRAM.
0.15
μ
m CMOS process technology
This technology offers 60% performance improvement over 0.25
μ
m Gate Array and can operate at 200
MHz (local: 333 MHz) system frequency.
High-density SRAM
The dual-port SRAM (1R/W + 1R/W) that operates at 200 MHz is specially designed.
This dual-port SRAM can be freely reconfigured as a single-port SRAM or into a bit
×
word configuration that
a customer may require.
This dual-port SRAM realizes approximately 10 times the density of a conventional 0.25
μ
m gate array.
The capacity of the dual-port SRAM (1R/W + 1R/W) mounted in the
μ
PD66201 to 66205 is 16 Kb (max.) per
unit, and that of the
μ
PD66206 to 66210 is 18 Kb (max.) per unit.
Embedded analog PLL and DLL
Two types of analog PLL blocks are diffused in each master slice: SSCG (Spread Spectrum Clock
Generation) and Phase Shift. Moreover, DLL (Slave DLL) blocks, which enable the DDR memory interface,
will also be diffused in
μ
PD66206 to 66210.
Multi-voltage support
CMOS-12M supports a 1.5 V core voltage and a 3.3 V
interface voltage. An optional 2.5 V, 1.8 V, or 1.5 V
interface voltage to support various high-speed interface
standards can also be added. This optional interface
voltage can be assigned to any side of the chip.
Three types of power lines are assigned on the chip--one
for the core power line, one for the standard 3.3 V
interface power line, and one for the optional high-speed
interface power line (VDDQ).
Power line architecture
VDDQ3
VDDQ2
APLL
(SSCG)
VDDQ4
SRAM
Sea of Gates
SRAM
SRAM
SRAM
APLL
(Phase
shift)
VDD33
SRAM
SRAM
VDD
Applications
Designs suitable for CMOS-12M are those that require:
- Large-size memory blocks
- High performance
- Low power consumption
- Small area
- Reduction in cost
APLL
(Phase
shift)
VDDQ1
VDD33:
Power line for standard interface buffers (3.3 V)
VDDQ1-VDDQ4: Power line for high-speed interface buffers (2.5 V /1.8 V /1.5 V)
VDD:
Power line for the core (1.5 V)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. A17424EJ3V0PF00 (3rd edition)
Date Published January 2006 CP(K)
©
NEC Electronics Corporation 2005
CMOS-12M
Application Examples
Data control of graphic LCDs
CMOS-12M is well suited for the data control function of the graphic LCD system.
If the amount of the graphical data is not large, the embedded SRAM modules (16 Kb or 18 Kb configuration,
up to 2.6 Mb) are used for the frame buffers. If the amount of the graphical data is large, the embedded
SRAM modules are used for the data processing function.
CMOS-12M
Graphic control,
Graphic processing
Dual-port RAM
(2.6 Mb)
Display data
RISC
CPU
Bus
control
Video control/
Video clock
control
Timing
Generator
LCD panel
Timing control
DLL
DLL
DLL
DDR Memory
Large-scale data flow processing
A large-scale data flow processing system, such as that for graphical processing, requires data buses with
widths of at least 128 bits. For a three-stage, 128-bit pipeline processor, three stages of memory modules are
required. Each stage consists of eight 1,024-word, dual-port SRAM modules (16 Kb configuration) running in
parallel. CMOS-12M supports 25.6 Gbps performance at 200 MHz system clock frequency based on this
configuration (see following block diagram).
DLL
CMOS-12M
Input
control
Dual-port
RAM
Date
processing
Dual-port
RAM
Date
processing
Dual-port
RAM
Date
processing
Output
control
Data flow control
Remark
Detailed verification for chip floorplanning is necessary to obtain the exact performance.
Please contact an NEC Electronics representative for more information.
Interface Buffers
Interface buffers
LVTTL
CMOS
SSTL2
SSTL3
LVDS
LVPECL
PCI
HSTL
PCI-X (mode1)
Macro
UART with FIFO (16550)
2
Pamphlet
A17424EJ3V0PF
CMOS-12M
Master Slices
Delay time
System frequency (Max)
Power consumption
Output drive capacity
Power supply voltage
Operating ambient temperature
62 ps (2-input NAND, F/O = 1, typical wire length)
200 MHz (local: 333 MHz)
19.6 nW/MHz/gate (Operation rate = 0.35)
I
OL
= 3, 6, 9, 12 mA
1.5±0.15 V (core), 1.5, 1.8, 2.5, 3.3 V (interface)
T
A
= -40 to +85
°C
(1/2)
Master
Density
Raw gates
Note 1
μ
PD66201
(K gate)
250
151
96
180
μ
PD66202
603
362
208
276
μ
PD66203
729
438
320
324
μ
PD66204
1243
621
432
404
μ
PD66205
2031
1016
576
500
Usable gates (K gate)
Embedded SRAM (Kb)
I/O pads
Note 2
(2/2)
Master
Density
Raw gates
Note 1
μ
PD66206
(K gate)
2524
1009
1,044
596
μ
PD66207
3177
1271
1,800
708
μ
PD66208
4175
1670
2,664
812
μ
PD66209
3331
1532
432
596
μ
PD66210
4458
2006
828
708
Usable gates (K gate)
Embedded SRAM (Kb)
I/O pads
Note 2
Notes 1.
2-input NAND
2.
Includes power pins and GND pins (the total available number of signal pins depends on the package
type)
Package Combination
There are many package options available to choose from.
For details such as the number of available signal pins, number of VDD/GND pins, or package availability
schedule, contact an NEC Electronics representative. All packages are lead-free.
Master
I/O
pad
Package
LQFP
Pin
100
144
QFP
FPBGA
208
108
160
208
PBGA
256
324
449
676
ABGA
352
500
576
672
756
Pitch Body size
(mm)
(mm)
0.5
0.5
0.5
0.8
0.8
0.8
1.0
1.0
1.0
1.0
1.27
1.27
1.27
1.27
1.27
14
×
14
20
×
20
28
×
28
11
×
11
13
×
13
15
×
15
17
×
17
19
×
19
27
×
27
27
×
27
35
×
35
40
×
40
40
×
40
45
×
45
45
×
45
μ
PD66201
μ
PD66202
μ
PD66203
μ
PD66204
μ
PD66205
μ
PD66206
μ
PD66207
μ
PD66208
μ
PD66209
μ
PD66210
180
276
324
404
500
596
708
812
596
708
Pamphlet
A17424EJ3V0PF
3
CMOS-12M
Design Environment
Function
NEC Electronics
Framework
Schematic editor
Logic synthesis
Test pattern creation
Logic verification
Timing verification
Formal verification
DFT
Placement and routing
Wave Editor
V.sim
Tiara
-
TESTACT/RobustSCAN
-
®
Tools
EDA vendors
-
-
-
Design Compiler , Synplify ASIC
-
ModelSim , NC-Verilog , VCS
PrimeTime , TimeCraft
TM
®
TM
®
®
®
®
OPENCAD
Vdraw
TM
CMOS-12M
Conformal -LEC, Formality
DFT Compiler , TetraMAX
SoC ENCOUNTER
TM
TM
®
®
Design Flow
Customer
RTL
Schematic editor
Logic synthesis
NEC Electronics
P&R (Placement and routing)
SDF creation (Pre-SDF)
Design rule check
Timing verification
(Guideline check)
Pre-Sign-off
Logic verification
Timing verification in pre-SDF
(Confirmation for target performance)
Clean File creation
SDF
(Standard Delay File)
1st Sign-off
SDF
(Standard Delay File)
2nd Sign-off
P&R (Placement and routing)
SDF creation
ATG
Manufacturing
Test program creation
Back Annotation
OPENCAD, FPBGA are the trademarks of NEC Electronics.
Other product names are the trademarks or registered trademarks of their respective companies.
4
Pamphlet
A17424EJ3V0PF
CMOS-12M
For further information,
please contact:
NEC Electronics Corporation
1753, Shimonumabe, Nakahara-ku,
Kawasaki, Kanagawa 211-8668,
Japan
Tel: 044-435-5111
http://www.necel.com/
[America]
NEC Electronics America, Inc.
2880 Scott Blvd.
Santa Clara, CA 95050-2554, U.S.A.
Tel: 408-588-6000
800-366-9782
http://www.am.necel.com/
[Europe]
NEC Electronics (Europe) GmbH
Arcadiastrasse 10
40472 Düsseldorf, Germany
Tel: 0211-65030
http://www.eu.necel.com/
Hanover Office
Podbielski Strasse 166 B
30177 Hanover
Tel: 0 511 33 40 2-0
Munich Office
Werner-Eckert-Strasse 9
81829 München
Tel: 0 89 92 10 03-0
Stuttgart Office
Industriestrasse 3
70565 Stuttgart
Tel: 0 711 99 01 0-0
United Kingdom Branch
Cygnus House, Sunrise Parkway
Linford Wood, Milton Keynes
MK14 6NP, U.K.
Tel: 01908-691-133
Succursale Française
9, rue Paul Dautier, B.P. 52180
78142 Velizy-Villacoublay Cédex
France
Tel: 01-3067-5800
Sucursal en España
Juan Esplandiu, 15
28007 Madrid, Spain
Tel: 091-504-2787
Tyskland Filial
Täby Centrum
Entrance S (7th floor)
18322 Täby, Sweden
Tel: 08 638 72 00
Filiale Italiana
Via Fabio Filzi, 25/A
20124 Milano, Italy
Tel: 02-667541
Branch The Netherlands
Limburglaan 5
5616 HR Eindhoven
The Netherlands
Tel: 040 265 40 10
G05.12A
[Asia & Oceania]
NEC Electronics (China) Co., Ltd
7th Floor, Quantum Plaza, No. 27 ZhiChunLu Haidian
District, Beijing 100083, P.R.China
TEL: 010-8235-1155
http://www.cn.necel.com/
NEC Electronics Shanghai Ltd.
Room 2509-2510, Bank of China Tower,
200 Yincheng Road Central,
Pudong New Area, Shanghai P.R. China P.C:200120
Tel: 021-5888-5400
http://www.cn.necel.com/
NEC Electronics Hong Kong Ltd.
12/F., Cityplaza 4,
12 Taikoo Wan Road, Hong Kong
Tel: 2886-9318
http://www.hk.necel.com/
Seoul Branch
11F., Samik Lavied’or Bldg., 720-2,
Yeoksam-Dong, Kangnam-Ku,
Seoul, 135-080, Korea
Tel: 02-558-3737
NEC Electronics Taiwan Ltd.
7F, No. 363 Fu Shing North Road
Taipei, Taiwan, R. O. C.
Tel: 02-2719-2377
NEC Electronics Singapore Pte. Ltd.
238A Thomson Road,
#12-08 Novena Square,
Singapore 307684
Tel: 6253-8311
http://www.sg.necel.com/
