PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD703130
V850E/MS2
32-BIT SINGLE-CHIP MICROCONTROLLER
The
µ
PD703130 is a member of the V850 Series of 32-bit single-chip microcontrollers designed for real-time
control operations. These microcontrollers provide on-chip features, including a 32-bit CPU, RAM, interrupt controller,
real-time pulse unit, serial interface, A/D converter, and DMA controller.
The
µ
PD703130 is a ROMless version product.
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
V850E/MS2 User’s Manual Hardware:
V850E/MS1, V850E/MS2 User’s Manual Architecture:
U14985E
U12197E
FEATURES
• Number of instructions: 81
• Minimum instruction execution time 30 ns (@ 33 MHz operation)
• General-purpose registers 32 bits
×
32
• Instruction set suitable for control applications
• Internal memory ROM: None
RAM: 4 KB
• Advanced on-chip interrupt controller
• Real-time pulse unit suitable for control operations
• Powerful serial interface (on-chip dedicated baud rate generator)
• On-chip clock generator
• 10-bit resolution A/D converter: 4 channels
• DMA controller: 4 channels
• Power saving functions
APPLICATIONS
• Optical storage equipment (DVD players, etc.)
• System control for digital consumer equipment, etc.
The information contained in this document is being issued in advance of the production cycle for the
product. The parameters for the product may change before final production or NEC Electronics
Corporation, at its own discretion, may withdraw the product prior to its production.
Not all products and/or types are availabe in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. U15390EJ1V1DS00 (1st edition)
Date Published August 2005 N CP(K)
Printed in Japan
The mark
shows major revised points.
2001
µ
PD703130
ORDERING INFORMATION
Maximum Operating
Frequency
33 MHz
33 MHz
Part Number
Package
100-pin plastic LQFP (fine pitch) (14
×
14)
100-pin plastic LQFP (fine pitch) (14
×
14)
Internal ROM
None
None
µ
PD703130GC-8EU
µ
PD703130GC-8EU-A
Remark
Products with -A at the end of the part number are lead-free products.
PIN CONFIGURATION (TOP VIEW)
100-pin plastic LQFP (fine pitch) (14
×
14)
•
µ
PD703130GC-8EU
•
µ
PD703130GC-8EU-A
D1
D0
V
DD
INTP103/DMARQ3/P07
INTP102/DMARQ2/P06
INTP101/DMARQ1/P05
INTP100/DMARQ0/P04
TCLR10/P02
TO100/P00
V
SS
INTP113/DMAAK3/P17
INTP112/DMAAK2/P16
INTP111/DMAAK1/P15
INTP110/DMAAK0/P14
TCLR11/P12
TO110/P10
TCLR12/P102
TO120/P100
ANI3/P73
ANI2/P72
ANI1/P71
ANI0/P70
AV
DD
AV
SS
AV
REF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
D2
D3
D4
D5
D6
D7
V
SS
D8/P50
D9/P51
D10/P52
D11/P53
D12/P54
D13/P55
D14/P56
D15/P57
HV
DD
A0
A1
A2
A3
A4
A5
A6
A7
V
SS
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
A8
A9
A10
A11
A12
A13
A14
A15
A16/P60
A17/P61
A18/P62
A19/P63
A20/P64
A21/P65
A22/P66
A23/P67
HV
DD
CS0/P80
CS3/RAS3/P83
CS4/RAS4/IOWR/P84
CS5/RAS5/IORD/P85
LCAS/LWR/P90
UCAS/UWR/P91
RD/P92
WE/P93
2
NMI/P20
TXD0/SO0/P22
RXD0/SI0/P23
SCK0/P24
TXD1/SO1/P25
RXD1/SI1/P26
SCK1/P27
V
DD
INTP130/P34
TI13/P33
CV
DD
X2
X1
CV
SS
CKSEL
MODE0
MODE2
RESET
V
SS
CLKOUT/PX7
WAIT/PX6
HLDRQ/P97
HLDAK/P96
OE/P95
BCYST/P94
Preliminary Data Sheet U15390EJ1V1DS
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
µ
PD703130
PIN NAMES
A0 to A23:
ANI0 to ANI3:
AV
DD
:
AV
REF
:
AV
SS
:
BCYST:
CKSEL:
CLKOUT:
CS0, CS3 to CS5:
CV
DD
:
CV
SS
:
D0 to D15:
Address bus
Analog input
Analog power supply
Analog reference voltage
Analog ground
Bus cycle start timing
Clock generator operating mode select
Clock output
Chip select
Clock generator power supply
Clock generator ground
Data bus
P20, P22 to P27:
P33, P34:
P50 to P57:
P60 to P67:
P70 to P73:
P80, P83 to P85:
P90 to P97:
P100, P102:
PX6, PX7:
RAS3 to RAS5:
RD:
RESET:
RXD0, RXD1:
SCK0, SCK1:
SI0, SI1:
SO0, SO1:
TI13:
TO100, TO110:
TO120
I/O read strobe
I/O write strobe
Lower column address strobe
Lower write strobe
Mode
Non-maskable interrupt request
Output enable
TXD0, TXD1:
UCAS:
UWR:
V
DD
:
V
SS
:
WAIT:
WE:
X1, X2:
Transmit data
Upper column address strobe
Upper write strobe
Power supply for internal unit
Ground
Wait
Write enable
Crystal
Port 2
Port 3
Port 5
Port 6
Port 7
Port 8
Port 9
Port 10
Port X
Row address strobe
Read
Reset
Receive data
Serial clock
Serial input
Serial output
Timer input
Timer output
DMAAK0 to DMAAK3: DMA acknowledge
DMARQ0 to DMARQ3: DMA request
HLDAK:
HLDRQ:
HV
DD
:
INTP110 to INTP113,
INTP130
IORD:
IOWR:
LCAS:
LWR:
MODE0, MODE2:
NMI:
OE:
Hold acknowledge
Hold request
Power supply for external pins
TCLR10 to TCLR12: Timer clear
INTP100 to INTP103, : Interrupt request from peripherals
P00, P02, P04 to P07: Port 0
P10, P12, P14 to P17: Port 1
Preliminary Data Sheet U15390EJ1V1DS
3
µ
PD703130
INTERNAL BLOCK DIAGRAM
CPU
NMI
INTP100 to INTP103
INTP110 to INTP113
INTP130
INTC
BCU
Instruction
queue
PC
System
registers
Multiplier
(32
×
32→64)
Barrel
shifter
DRAMC
TO100,TO110,
TO120
RPU
RAM
General-purpose
registers
(32 bits
×
32)
ALU
PageROM
controller
TCLR10 to TCLR12
TI13
SIO
SO0/TXD0
SI0/RXD0
SCK0
4 KB
DMAC
HLDRQ
HLDAK
CS0,CS3 to CS5
RAS3 to RAS5
IOWR
IORD
BCYST
WE
RD
OE
UWR/UCAS
LWR/LCAS
WAIT
A0 to A23
D0 to D15
DMARQ0 to DMARQ3
DMAAK0 to DMAAK3
UART0/CSI0
BRG0
SO1/TXD1
SI1/RXD1
SCK1
UART1/CSI1
BRG1
Port
CG
ANI0 to ANI3
AV
REF
AV
SS
AV
DD
ADC
PX6,PX7
P100,P102
P90 to P97
P80,P83 to P85
P70 to P73
P60 to P67
P50 to P57
P33,P34
P22 to P27
P20
P10,P12,P14 to P17
P00,P02,P04 to P07
HV
DD
CKSEL
CLKOUT
X1
X2
CV
DD
CV
SS
MODE0,MODE2
RESET
V
DD
V
SS
System
controller
4
Preliminary Data Sheet U15390EJ1V1DS
µ
PD703130
CONTENTS
1.
2.
DIFFERENCES BETWEEN V850E/MS2 AND V850E/MS1...........................................................
PIN
2.1
2.2
2.3
FUNCTIONS.............................................................................................................................
Port Pins.................................................................................................................................
Non-Port Pins.........................................................................................................................
Pin I/O Circuits and Recommended Connection of Unused Pins ....................................
6
7
7
9
11
14
68
69
3.
4.
5.
ELECTRICAL SPECIFICATIONS...................................................................................................
PACKAGE DRAWING ....................................................................................................................
RECOMMENDED SOLDERING CONDITIONS ............................................................................
Preliminary Data Sheet U15390EJ1V1DS
5
