DATA SHEET
µ
PD780226, 780228
8-BIT SINGLE-CHIP MICROCONTROLLERS
MOS INTEGRATED CIRCUIT
DESCRIPTION
The
µ
PD780226 and
µ
PD780228 are members of the
µ
PD780228 Subseries of the 78K/0 Series.
The FIP™ (VFD) controller/driver and N-ch open-drain port of the conventional
µ
PD78044H Subseries have been
enhanced for the
µ
PD780228 Subseries.
A flash memory version, the
µ
PD78F0228, that can operate within the same power supply voltage range as the
mask ROM version, and various development tools are under development.
The details of functions are described in the following user’s manuals. Be sure to read them before
designing.
µ
PD780228 Subseries User’s Manual : U12012E
78K/0 Series User’s Manual Instructions : IEU-1372
FEATURES
• I/O ports: 72 (sixteen N-ch open-drain I/O ports)
• Internal high-capacity ROM and RAM
Item
Part Number
Program memory
(ROM)
48 Kbytes
60 Kbytes
Internal high-speed RAM
1024 bytes
Data memory
Internal expanded RAM
512 bytes
FIP display RAM
96 bytes
µ
PD780226
µ
PD780228
• Minimum instruction execution time can be changed
from high-speed (0.4
µ
s) to low-speed (6.4
µ
s)
• FIP controller/driver: 48 display outputs
(Universal grid supported)
• 8-bit resolution A/D converter: eight channels
• Serial interface: one channel
• Timer: Four channels
• Power supply voltage: V
DD
= 4.5 to 5.5 V
APPLICATIONS
Compact-type integrated system components, separate-type system components, tuners, cassette tape decks,
compact disc players, audio amplifiers, etc.
ORDERING INFORMATION
Part Number
Package
100-pin plastic QFP (14
×
20 mm)
100-pin plastic QFP (14
×
20 mm)
µ
PD780226GF-×××-3BA
µ
PD780228GF-×××-3BA
Remark
×××
indicates the ROM code suffix.
The information in this document is subject to change without notice.
Document No. U11797EJ1V0DS00 (1st edition)
Date Published July 1997 N
Printed in Japan
The mark
shows major revised points.
©
1996
µ
PD780226, 780228
78K/0 Series Development
The following shows the 78K/0 Series products development. Subseries names are shown inside frames.
Mass-produced products
Products under development
2
Y Subseries supports the I C bus specifications.
Control
100-pin
100-pin
100-pin
100-pin
80-pin
80-pin
80-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
42/44-pin
µ
PD78075B
µ
PD78078
µ
PD78070A
µ
PD780058
µ
PD78058F
µ
PD78054
µ
PD780034
µ
PD780024
µ
PD78014H
µ
PD78018F
µ
PD78014
µ
PD780001
µ
PD78002
µ
PD78083
µ
PD78075BY
µ
PD78078Y
µ
PD78070AY
µ
PD780018AY
Note
µ
PD780058Y
µ
PD78058FY
µ
PD78054Y
µ
PD780034Y
µ
PD780024Y
µ
PD78018FY
µ
PD78014Y
µ
PD78002Y
Low EMI noise version of the
µ
PD78078
Timer is added to the
µ
PD78054 and its external interface is enhanced.
ROM-less versions of the
µ
PD78078
Serial I/O of the
µ
PD78078 is enhanced and only selected functions are provided.
Serial I/O-enhanced versions of the
µ
PD78054; Low EMI noise version
Low EMI noise version of the
µ
PD78054
UART and D/A converter are added to the
µ
PD78014 and I/O is enhanced.
A/D-enhanced version of the
µ
PD780024
Serial I/O-enhanced versions of the
µ
PD78018F; Low EMI noise version
Low EMI noise version of the
µ
PD78018F
Low-voltage (1.8 V) operation versions of the
µ
PD78014 with several ROM and RAM capacities available.
A/D converter and 16-bit timer are added to the
µ
PD78002.
A/D converter is added to the
µ
PD78002.
Basic subseries for control applications
On-chip UART, and operable at low voltage (1.8 V).
Inverter control
64-pin
64-pin
78K/0
series
100-pin
100-pin
80-pin
80-pin
µ
PD780964
µ
PD780924
A/D-enhanced version of the
µ
PD780924
On-chip inverter control circuit and UART incorporated; Low EMI noise version
FIP driving
µ
PD780208
µ
PD780228
µ
PD78044H
µ
PD78044F
I/O and FIP C/D of the
µ
PD78044F are enhanced. Total display outputs : 53 pins
I/O and FIP C/D of the
µ
PD78044H are enhanced. Total display outputs : 48 pins
N-ch open-drain I/O is added to the
µ
PD78044F. Total display outputs : 34 pins
Basic subseries for FIP driving. Total display outputs: 34 pins
LCD driving
100-pin
100-pin
100-pin
µ
PD780308
µ
PD78064B
µ
PD78064
µ
PD780308Y
µ
PD78064Y
SIO of the
µ
PD78064 is enhanced, and ROM and RAM are expanded.
Low EMI noise version of the
µ
PD78064
Basic subseries for driving LCDs and with on-chip UART.
IEBus
80-pin
80-pin
TM
supported
Low EMI noise version of the
µ
PD78098.
IEBus controller is added to the
µ
PD78054.
µ
PD78098B
µ
PD78098
Meter driving
80-pin
µ
PD780973
On-chip controller/driver for driving automobile meters
LV
64-pin
µ
PD78P0914
PWM output, LV digital code decoder and Hsync counter are incorporated.
Note
Under planning
2
µ
PD780226, 780228
The following table shows the differences among subseries functions.
Function
Subseries name
Control
ROM
capacity
8-bit 10-bit 8-bit Serial interface
8-bit 16-bit Watch
WDT
A/D A/D D/A
—
Timer
I/O V
DD
MIN. External
value expansion
1.8 V
Available
µ
PD78075B
µ
PD78078
µ
PD78070A
µ
PD780058
µ
PD78058F
µ
PD78054
µ
PD780034
µ
PD780024
µ
PD78014H
µ
PD78018F
µ
PD78014
µ
PD780001
µ
PD78002
µ
PD78083
32K to 40K 4 ch 1 ch 1 ch 1 ch 8 ch
48K to 60K
—
24K to 60K 2 ch
2 ch 3 ch (UART: 1 ch) 88
61
2 ch 3 ch (Time division 68
UART: 1 ch)
3 ch (UART: 1 ch) 69
2.7 V
1.8 V
48K to 60K
16K to 60K
8K to 32K
—
8 ch
8 ch
—
—
2.7 V
2.0 V
3 ch (UART: 1 ch, Time 51
division 3-wire: 1 ch)
2 ch
53
1.8 V
8K to 60K
8K to 32K
8K
8K to 16K
—
—
1 ch
—
8K to 32K
3 ch
Note
—
1 ch
—
8 ch
—
8 ch
32K to 60K 2 ch 1 ch 1 ch 1 ch 8 ch
48K to 60K 3 ch
—
—
8 ch
—
—
—
2 ch
1 ch
74
72
68
2 ch
—
—
3 ch (Time division 57
UART: 1 ch)
2.0 V
—
2.7 V
4.5 V
2.7 V
—
—
1 ch
39
53
1 ch (UART: 1 ch) 33
2 ch (UART: 2 ch) 47
1.8 V
2.7 V
2.7 V
—
Available
—
Available
Inverter
control
µ
PD780964
µ
PD780924
FIP driving
µ
PD780208
µ
PD780228
µ
PD78044H 32K to 48K 2 ch 1 ch 1 ch
µ
PD78044F
LCD
driving
16K to 40K
48K to 60K 2 ch 1 ch 1 ch 1 ch 8 ch
µ
PD780308
µ
PD78064B
µ
PD78064
32K
16K to 32K
40K to 60K 2 ch 1 ch 1 ch 1 ch 8 ch
32K to 60K
24K to 32K 3 ch 1 ch 1 ch 1 ch 5 ch
—
—
—
2 ch (UART: 1 ch)
IEBus
supported
Meter
driving
LV
µ
PD78098B
µ
PD78098
µ
PD780973
2 ch 3 ch (UART: 1 ch) 69
2.7 V
Available
2 ch (UART: 1 ch) 56
4.5 V
—
µ
PD78P0914 32K
6 ch
—
—
1 ch 8 ch
—
—
2 ch
54
4.5 V
Available
Note
10-bit timer: 1 channel
3
µ
PD780226, 780228
FUNCTION OVERVIEW
Product Name
Item
Internal memory
ROM
High-speed RAM
Expansion RAM
FIP display RAM
General-purpose register
Minimum instruction execution time
Instruction set
I/O ports (including alternate
function pins for FIP)
48 Kbytes
1024 bytes
512 bytes
96 bytes
8 bits
×
32 registers (8 bits
×
8 registers
×
4 banks)
• On-chip minimum instruction execution time variable function
• 0.4
µ
s/0.8
µ
s/1.6
µ
s/3.2
µ
s/6.4
µ
s (@ 5.0-MHz operation with main system clock)
• Multiply/divide (8 bits
×
8 bits, 16 bits
÷
8 bits)
• Bit manipulate (set, reset, test, Boolean operation)
Total
• CMOS inputs
• CMOS I/Os
• N-ch open-drain I/Os
• P-ch open-drain I/Os
• P-ch open-drain outputs
FIP controller/driver
Total of display outputs
• 10-mA display current
• 3-mA display current
A/D converter
Serial interface
Timer
: 72
: 8
: 16
: 16
: 24
: 8
: 48
: 16
: 32
60 Kbytes
µ
PD780226
µ
PD780228
• 8-bit resolution
×
8 channels
• Power supply voltage: AV
DD
= 4.5 to 5.5 V
3-wired serial interface I/O mode: 1 channel
• 8-bit remote control timer
• 8-bit PWM timer
• Watchdog timer
: 1 channel
: 2 channels
: 1 channel
Timer output
Vectored interrupt
sources
Maskable
Non-maskable
Software
Power supply voltage
Package
2 (8-bit PWM output is available)
Internal: 6, external: 4
Internal: 1
1
V
DD
= 4.5 to 5.5 V
100-pin plastic QFP (14
×
20 mm)
4
µ
PD780226, 780228
CONTENTS
1.
2.
3.
PIN CONFIGURATION (TOP VIEW) ................................................................................................. 6
BLOCK DIAGRAM ............................................................................................................................. 8
PIN FUNCTION LIST .......................................................................................................................... 9
3.1
3.2
3.3
Port Pins ..................................................................................................................................................... 9
Non-port Pins .......................................................................................................................................... 11
Pin I/O Circuits and Recommended Connection of Unused Pins ................................................... 12
4.
5.
MEMORY SPACE ............................................................................................................................. 14
PERIPHERAL HARDWARE FUNCTION FEATURES ................................................................... 15
5.1
5.2
5.3
5.4
5.5
5.6
Port ............................................................................................................................................................ 15
Clock Generator ...................................................................................................................................... 16
Timer/Event Counter ............................................................................................................................... 16
A/D Converter .......................................................................................................................................... 18
Serial Interface ........................................................................................................................................ 19
FIP Controller/Driver ............................................................................................................................... 19
6.
7.
8.
9.
INTERRUPT FUNCTIONS ............................................................................................................... 21
STANDBY FUNCTION ..................................................................................................................... 24
RESET FUNCTION ........................................................................................................................... 24
INSTRUCTION SET .......................................................................................................................... 25
10. ELECTRICAL SPECIFICATIONS ................................................................................................... 27
11. PACKAGE DRAWING ...................................................................................................................... 42
12. RECOMMENDED SOLDERING CONDITIONS .............................................................................. 43
APPENDIX A. DEVELOPMENT TOOLS .............................................................................................. 44
APPENDIX B. RELATED DOCUMENTS .............................................................................................. 46
5
