DATA SHEET
GaAs INTEGRATED CIRCUIT
μ
PG2162T5N
DPDT SWITCH FOR 2.4 GHz AND 6 GHz DUAL-BAND WIRELESS LAN
DESCRIPTION
The
μ
PG2162T5N is a GaAs MMIC DPDT (Double Pole Double Throw) switch which was developed for 2.4 GHz
and 6 GHz dual-band wireless LAN. This device can operate frequency from 2.4 GHz band and 6 GHz band, having
the low insertion loss and high isolation.
This device is housed in a 6-pin plastic TSON (Thin Small Out-line Non-leaded) package. And this package is able
to high-density surface mounting.
FEATURES
• Operating frequency
• Switch control voltage
• Low insertion loss
• High isolation
• Handling power
: f = 2.4 to 2.5 GHz and 4.9 to 6.0 GHz
: V
cont (H)
= 2.8 to 5.0 V (3.0 V TYP.)
: V
cont (L)
=
−0.3
to 0.3 V (0 V TYP.)
: L
ins
1 = 0.60 dB TYP. @ f = 2.4 to 2.5 GHz, V
cont (H)
= 3.0 V, V
cont (L)
= 0 V
: L
ins
2 = 0.85 dB TYP. @ f = 4.9 to 6.0 GHz, V
cont (H)
= 3.0 V, V
cont (L)
= 0 V
: ISL3 = 30 dB TYP. @ f = 2.4 to 2.5 GHz, V
cont (H)
= 3.0 V, V
cont (L)
= 0 V
: ISL4 = 27 dB TYP. @ f = 4.9 to 6.0 GHz, V
cont (H)
= 3.0 V, V
cont (L)
= 0 V
: P
in (1 dB)
= +31.0 dBm TYP. @ f = 2.5 GHz, V
cont (H)
= 3.0 V, V
cont (L)
= 0 V
: P
in (1 dB)
= +29.0 dBm TYP. @ f = 6.0 GHz, V
cont (H)
= 3.0 V, V
cont (L)
= 0 V
• High-density surface mounting : 6-pin plastic TSON package (1.5
×
1.5
×
0.37 mm)
APPLICATIONS
• Dual-band wireless LAN (IEEE802.11a + b/g)
ORDERING INFORMATION
Part Number
Order Number
Package
6-pin plastic TSON
(Pb-Free)
Marking
G5A
Supplying Form
•
Embossed tape 8 mm wide
•
Pin 1, 6 face the perforation side of the tape
•
Qty 3 kpcs/reel
μ
PG2162T5N-E2
μ
PG2162T5N-E2-A
Remark
To order evaluation samples, contact your nearby sales office.
Part number for sample order:
μ
PG2162T5N
Caution Observe precautions when handling because these devices are sensitive to electrostatic discharge.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. PG10632EJ02V0DS (2nd edition)
Date Published February 2008 NS
Printed in Japan
The mark <R> shows major revised points.
2006, 2008
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
μ
PG2162T5N
PIN CONNECTIONS AND INTERNAL BLOCK DIAGRAM
(Top View)
(Top View)
(Bottom View)
Pin No.
1
Pin Name
ANT2
V
cont
2
OUT2 (RX)
OUT1 (TX)
V
cont
1
ANT1
1
6
1
6
6
1
2
3
G5A
V
cont
1
High
Low
V
cont
2
Low
High
Parameter
Parameter
2
5
2
5
5
2
4
5
6
3
4
3
4
4
3
Remark
Exposed pad : GND
TRUTH TABLE
ANT1−OUT1 (TX)
OFF
ON
ANT1−OUT2 (RX)
ON
OFF
ANT2−OUT1 (TX)
ON
OFF
ANT2−OUT2 (RX)
OFF
ON
ABSOLUTE MAXIMUM RATINGS (T
A
= +25°C, unless otherwise specified)
Symbol
V
cont
P
in
T
A
T
stg
Ratings
−6.0
to +6.0
+32
−45
to +85
−55
to +135
Unit
V
dBm
°C
°C
Switch Control Voltage
Input Power
Operating Ambient Temperature
Storage Temperature
RECOMMENDED OPERATING RANGE (T
A
= +25°C, unless otherwise specified)
Symbol
V
cont (H)
V
cont (L)
f1
f2
MIN.
2.8
−0.3
2.4
4.9
TYP.
3.0
0
−
−
MAX.
5.0
0.3
2.5
6.0
Unit
V
V
GHz
GHz
Switch Control Voltage (H)
Switch Control Voltage (L)
Operating Frequency 1
Operating Frequency 2
2
Data Sheet PG10632EJ02V0DS
μ
PG2162T5N
ELECTRICAL CHARACTERISTICS
(T
A
= +25°C, V
cont (H)
= 3.0 V, V
cont
otherwise specified)
Parameter
Insertion Loss 1
Insertion Loss 2
Isolation 1 (ANT to OUT)
Isolation 2 (ANT to OUT)
Isolation 3 (ANT1 to ANT2, TX to RX)
Isolation 4 (ANT1 to ANT2, TX to RX)
Input Return Loss 1
Input Return Loss 2
Output Return Loss 1
Output Return Loss 2
1 dB Loss Compression
Note
Input Power 1
1 dB Loss Compression
Note
Input Power 2
Input 3rd Order Intercept Point
Symbol
L
ins
1
L
ins
2
ISL1
ISL2
ISL3
ISL4
RL
in
1
RL
in
2
RL
out
1
RL
out
2
(L)
= 0 V, Z
0
= 50
Ω,
DC blocking capacitors = 4 pF, unless
Test Conditions
f = 2.4 to 2.5 GHz
f = 4.9 to 6.0 GHz
f = 2.4 to 2.5 GHz
f = 4.9 to 6.0 GHz
f = 2.4 to 2.5 GHz
f = 4.9 to 6.0 GHz
f = 2.4 to 2.5 GHz
f = 4.9 to 6.0 GHz
f = 2.4 to 2.5 GHz
f = 4.9 to 6.0 GHz
MIN.
−
−
30
30
27
24
−
−
−
−
−
−
−
−
TYP.
0.60
0.85
35
34
30
27
15
15
15
15
+31.0
MAX.
0.85
1.10
−
−
−
−
−
−
−
−
−
−
−
Unit
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBm
P
in (1 dB)
1 f = 2.4 to 2.5 GHz
P
in (1 dB)
2 f = 4.9 to 6.0 GHz
+29.0
dBm
IIP
3
f1 = 2 500 MHz, f2 = 2 501 MHz,
P
in
(1 tone) = +20 dBm
+50
dBm
Switch Control Current
Switch Control Speed
I
cont
t
SW
50% CTL to 90/10%
0.1
150
1.0
−
μ
A
ns
−
Note
P
in
(1 dB)
is measured the input power level when the insertion loss increases more 1 dB than that of linear
range.
Caution This device is used it is necessary to use DC blocking capacitors.
Data Sheet PG10632EJ02V0DS
3
μ
PG2162T5N
EVALUATION CIRCUIT
4 pF
ANT2
1
6
4 pF
ANT1
V
cont
2
1 000 pF
2
5
1 000 pF
V
cont
1
OUT2 (RX)
4 pF
3
4
4 pF
OUT1 (TX)
The application circuits and their parameters are for reference only and are not intended for use in actual design-ins.
4
Data Sheet PG10632EJ02V0DS
μ
PG2162T5N
MOUNTING PAD AND SOLDER MASK LAYOUT DIMENSIONS
6-PIN PLASTIC TSON (UNIT: mm)
MOUNTING PAD
0.3
0.5
0.3
1.0
0.3
0.2
0.3
SOLDER MASK
0.475
0.25
0.475
0.35
0.55
0.15
0.25
Solder thickness : 0.08 mm
Remark
The mounting pad and solder mask layouts in this document are for reference only.
0.5
0.5
0.5
0.5
Data Sheet PG10632EJ02V0DS
5
FPGA/CPLD
