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UT54ACTS151-PCA

Multiplexer, ACT Series, 1-Func, 8 Line Input, 1 Line Output, Complementary Output, CMOS, CDIP16, SIDE-BRAZED, CERAMIC, DIP-16

器件类别:逻辑    逻辑   

厂商名称:Cobham Semiconductor Solutions

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器件参数
参数名称
属性值
厂商名称
Cobham Semiconductor Solutions
零件包装代码
DIP
包装说明
DIP,
针数
16
Reach Compliance Code
unknown
系列
ACT
JESD-30 代码
R-CDIP-T16
逻辑集成电路类型
MULTIPLEXER
功能数量
1
输入次数
8
输出次数
1
端子数量
16
最高工作温度
125 °C
最低工作温度
-55 °C
输出极性
COMPLEMENTARY
封装主体材料
CERAMIC, METAL-SEALED COFIRED
封装代码
DIP
封装形状
RECTANGULAR
封装形式
IN-LINE
传播延迟(tpd)
25 ns
认证状态
Not Qualified
座面最大高度
5.08 mm
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
NO
技术
CMOS
温度等级
MILITARY
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
宽度
7.62 mm
文档预览
UT54ACS151/UT54ACTS151
Radiation-Hardened
1 of 8 Data Selectors/Multiplexers
FEATURES
• 8-line to 1-line multiplexers can perform as
Boolean function generators, parallel-to-serial
converters, and data source selectors
radiation-hardened CMOS
- Latchup immune
• High speed
• Low power consumption
• Single 5 volt supply
• Available QML Q or V processes
• Flexible package
- 16-pin DIP
- 16-lead flatpack
DESCRIPTION
The UT54ACS151 and the UT54ACTS151 are data multiplex-
ers that provide full binary decoding to select one of eight data
sources. The strobe input, G, must be at a low logic level to
enable the inputs. A high level at the strobe terminal forces the
Y output high and the Y output low.
The devices are characterized over full military temperature
range of -55 C to +125 C.
FUNCTION TABLE
INPUTS
SELECT
C
X
L
L
L
L
H
H
H
H
B
X
L
L
H
H
L
L
H
H
A
X
L
H
L
H
L
H
L
H
STROBE
G
H
L
L
L
L
L
L
L
L
Y
L
D0
D1
D2
D3
D4
D5
D6
D7
Y
H
D0
D1
D2
D3
D4
D5
D6
D7
OUTPUT
PINOUTS
16-Pin DIP
Top View
D3
D2
D1
D0
Y
Y
G
V
ss
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
D4
D5
D6
D7
A
B
C
16-Lead Flatpack
Top View
D3
D2
D1
D0
Y
Y
G
V
ss
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
D4
D5
D6
D7
A
B
C
LOGIC SYMBOL
(7)
G
(11)
A
(10)
B
(9)
C
(4)
D0
(3)
D1
(2)
D2
(1)
D3
(15)
D4
(14)
D5
(13)
D6
(12)
D7
MUX
E
N
0
1
2
0
1
2
3
4
5
6
(5)
(6)
Y
Y
0
G
---
3
H= high level, L = low level, X = irrelevant
D0, D1... D7 = the level of the D respective input
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
83
RadHard MSI Logic
UT54ACS151/UT54ACTS151
LOGIC DIAGRAM
STROBE G
D0
(7)
(4)
D1
(3)
D2
(2)
D3
DATA
D4
(1)
(5)
(6)
(15)
Y
OUTPUTS
Y
D5
(14)
D6
(13)
D7
(12)
A
DATA
SELECT
B
C
(11)
(10)
(9)
RadHard MSI Logic
84
UT54ACS151/UT54ACTS151
RADIATION HARDNESS SPECIFICATIONS
1
PARAMETER
Total Dose
SEU Threshold
2
SEL Threshold
Neutron Fluence
LIMIT
1.0E6
80
120
1.0E14
UNITS
rads(Si)
MeV-cm
2
/mg
MeV-cm
2
/mg
n/cm
2
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
DD
V
I/O
T
STG
T
J
T
LS
JC
PARAMETER
Supply voltage
Voltage any pin
Storage Temperature range
Maximum junction temperature
Lead temperature (soldering 5 seconds)
Thermal resistance junction to case
DC input current
Maximum power dissipation
LIMIT
-0.3 to 7.0
-.3 to V
DD
+.3
-65 to +150
+175
+300
20
10
1
UNITS
V
V
C
C
C
C/W
mA
W
I
I
P
D
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device
at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
DD
V
IN
T
C
PARAMETER
Supply voltage
Input voltage any pin
Temperature range
LIMIT
4.5 to 5.5
0 to V
DD
-55 to + 125
UNITS
V
V
C
85
RadHard MSI Logic
UT54ACS151/UT54ACTS151
DC ELECTRICAL CHARACTERISTICS
7
(V
DD
= 5.0V 10%; V
SS
= 0V
6
, -55 C < T
C
< +125 C)
SYMBOL
V
IL
PARAMETER
Low-level input voltage
1
ACTS
ACS
High-level input voltage
1
ACTS
ACS
Input leakage current
ACTS/ACS
Low-level output voltage
3
ACTS
ACS
High-level output voltage
3
ACTS
ACS
Short-circuit output current
2 ,4
ACTS/ACS
Output current
10
(Sink)
I
OH
Output current
10
(Source)
P
total
I
DDQ
I
DDQ
Power dissipation
2, 8, 9
Quiescent Supply Current
Quiescent Supply Current Delta
ACTS
V
IN
= V
DD
or V
SS
I
OL
= 8.0mA
I
OL
= 100 A
I
OH
= -8.0mA
I
OH
= -100 A
V
O
= V
DD
and V
SS
V
IN
= V
DD
or V
SS
V
OL
= 0.4V
V
IN
= V
DD
or V
SS
V
OH
= V
DD
- 0.4V
C
L
= 50pF
V
DD
= 5.5V
For input under test
V
IN
= V
DD
- 2.1V
For all other inputs
V
IN
= V
DD
or V
SS
V
DD
= 5.5V
C
IN
C
OUT
Input capacitance
5
Output capacitance
5
= 1MHz @ 0V
= 1MHz @ 0V
15
15
pF
pF
2.3
10
1.6
mW/
MHz
A
mA
-8
mA
.7V
DD
V
DD
- 0.25
-200
8
200
.5V
DD
.7V
DD
-1
1
CONDITION
MIN
MAX
0.8
.3V
DD
UNIT
V
V
IH
V
I
IN
V
OL
A
0.40
0.25
V
V
OH
V
I
OS
I
OL
mA
mA
RadHard MSI Logic
86
UT54ACS151/UT54ACTS151
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V
IH
= V
IH
(min) + 20%, - 0%; V
IL
= V
IL
(max) + 0%,
- 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but
are guaranteed to V
IH
(min) and V
IL
(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density 5.0E5 amps/cm
2
, the maximum product of load capacitance (per output buffer) times frequency should not exceed
3,765 pF/MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and V
SS
at frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose 1E6 rads(Si).
8. Power does not include power contribution of any TTL output sink current.
9. Power dissipation specified per switching output.
10. This value is guaranteed based on characterization data, but not tested.
87
RadHard MSI Logic
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