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V437464C24VBTG-10PC

Synchronous DRAM Module, 64MX72, 6ns, CMOS, DIMM-168

器件类别:存储    存储   

厂商名称:Mosel Vitelic Corporation ( MVC )

厂商官网:http://www.moselvitelic.com

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器件参数
参数名称
属性值
厂商名称
Mosel Vitelic Corporation ( MVC )
零件包装代码
DIMM
包装说明
DIMM, DIMM168
针数
168
Reach Compliance Code
unknown
ECCN代码
EAR99
访问模式
SINGLE BANK PAGE BURST
最长访问时间
6 ns
其他特性
AUTO/SELF REFRESH
最大时钟频率 (fCLK)
100 MHz
I/O 类型
COMMON
JESD-30 代码
R-XDMA-N168
内存密度
4831838208 bit
内存集成电路类型
SYNCHRONOUS DRAM MODULE
内存宽度
72
功能数量
1
端口数量
1
端子数量
168
字数
67108864 words
字数代码
64000000
工作模式
SYNCHRONOUS
最高工作温度
70 °C
最低工作温度
组织
64MX72
输出特性
3-STATE
封装主体材料
UNSPECIFIED
封装代码
DIMM
封装等效代码
DIMM168
封装形状
RECTANGULAR
封装形式
MICROELECTRONIC ASSEMBLY
电源
3.3 V
认证状态
Not Qualified
刷新周期
8192
自我刷新
YES
最大待机电流
0.036 A
最大压摆率
3.96 mA
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
3 V
标称供电电压 (Vsup)
3.3 V
表面贴装
NO
技术
CMOS
温度等级
COMMERCIAL
端子形式
NO LEAD
端子节距
1.27 mm
端子位置
DUAL
文档预览
V437464C24V
3.3 VOLT 64M x 72 HIGH PERFORMANCE
PC133 REGISTERED PLL ECC SDRAM
MODULE
Description
PRELIMINARY
s
168 Pin Registered ECC 67,108,864 x 72 bit
Oganization SDRAM Modules
s
Utilizes High Performance 64M x 4 SDRAM in
TSOPII-54 Packages
s
Fully PC Board Layout Compatible to INTEL’S
Rev 1.2 Module Specification
s
Single +3.3V (± 0.3V) Power Supply
s
Programmable CAS Latency, Burst Length, and
Wrap Sequence (Sequential & Interleave)
s
Auto Refresh (CBR) and Self Refresh
s
All Inputs, Outputs are LVTTL Compatible
s
8192 Refresh Cycles every 64 ms
s
Serial Present Detect (SPD)
s
SDRAM Performance
Key Component Timing Parameters
t
CK
t
AC
t
AC
Clock Frequency (max.)
Clock Access Time CAS Latency = 3
Clock Access Time CAS Latency = 2
CILETIV LESOM
Features
Frequency
V437464C24V
133 MHz (PC)
V437464C24V
133 MHz
V437464C24V
100 MHz (PC)
V437464C24V Rev.1.0 January 2002
The V437464C24V memory module is organized
67,108,864 x 72 bits in a 168 pin dual in line
memory module (DIMM). The 64M x 72 registered
DIMM uses 18 Mosel-Vitelic 64M x 4 ECC SDRAM.
The x72 registered modules are ideal for use in high
performance computer systems where increased
memory density and fast access times are required.
-7PC
143
5.4
5.4
-7
143
5.4
6
-8PC
125
6
6
Units
MHz
ns
ns
s
Module Frequency vs AC Parameter
CL
(CAS Latency)
2
t
RCD
2
t
RP
2
t
RC
8
Unit
CLK
3
3
3
8
CLK
2
2
2
7
CLK
1
V437464C24V
Front
DQM1
CS0
DU
VSS
A0
A2
A4
A6
A8
A10(AP)
BA1
VCC
VCC
CLK0
VSS
DU
CS2
DQM2
DQM3
DU
VCC
NC
NC
CB2
CB3
VSS
I/O17
I/O18
Pin
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
Front
I/O19
I/O20
VCC
I/O21
NC
DU
CKE1*
VSS
I/O22
I/O23
I/O24
VSS
I/O25
I/O26
I/O27
I/O28
VCC
I/O29
I/O30
I/O31
I/O32
VSS
CLK2*
NC
WP
SDA
SCL
VCC
Pin
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
Back
VSS
I/O33
I/O34
I/O35
I/O36
VCC
I/O37
I/O38
I/O39
I/O40
I/O41
VSS
I/O42
I/O43
I/O44
I/O45
I/O46
VCC
I/O47
I/O48
CB4
CB5
VSS
NC
NC
VCC
CAS
DQM4
Pin
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
Back
DQM5
CS1
RAS
VSS
A1
A3
A5
A7
A9
BA0
A11
VCC
CLK1*
A12
VSS
CKE0
CS3
DQM6
DQM7
DU
VCC
NC
NC
CB6
CB7
VSS
I/O49
I/O50
Pin
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
Back
I/O51
I/O52
VCC
I/O53
NC
DU
REGE
VSS
I/O54
I/O55
I/O56
VSS
I/O57
I/O58
I/O59
I/O60
VCC
I/O61
I/O62
I/O63
I/O64
VSS
CLK3*
NC
SA0
SA1
SA2
VCC
CILETIV LESOM
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Front
VSS
I/O1
I/O2
I/O3
I/O4
VCC
I/O5
I/O6
I/O7
I/O8
I/O9
VSS
I/O10
I/O11
I/O12
I/O13
I/O14
VCC
I/O15
I/O16
CBO
CB1
VSS
NC
NC
VCC
WE
DQM0
Pin
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
Pin Configurations (Front Side/Back Side)
Notes:
*
These pins are not used in this module.
Pin Names
A0–A12
I/O1–I/O64
RAS
CAS
WE
BA0, BA1
CKE0
CS0, CS2
CLK0–CLK3
DQM0–DQM7
VCC
VSS
SCL
Address Inputs
Data Inputs/Outputs
Row Address Strobe
Column Address Strobe
Read/Write Input
Bank Selects
Clock Enable
Chip Select
Clock Input
Data Mask
Power (+3.3 Volts)
Ground
Clock for Presence Detect
CB0–CB4
NC
REGE
DU
SA0–A2
SDA
Serial Data OUT for Presence
Detect
Serial Data IN for Presence
Detect
Check Bits (x72 Organization)
No Connection
Register Enable
Don’t Use
V437464C24V Rev. 1.0 January 2002
2
V437464C24V
Block Diagram
RCS0
RQM0
I/O1–I/O4
10Ω
CS
DQM
I/O1–I/O8 D0
CS
DQM
I/O1–I/O8 D1
CS
DQM
I/O1–I/O8 D2
CS
DQM
I/O1–I/O8 D3
CS
DQM
I/O1–I/O8 D4
RQM4
I/O33–I/O36
10Ω
CS
DQM
I/O1–I/O8 D9
CS
DQM
I/O1–I/O8 D10
CS
DQM
I/O1–I/O8 D11
CS
DQM
I/O1–I/O8 D12
CS
DQM
I/O1–I/O8 D13
I/O13–I/O16
10Ω
RQM2
I/O17–I/O20
10Ω
I/O21–I/O24
10Ω
RQM3
I/O25–I/O28
10Ω
I/O29–I/O32
10Ω
CILETIV LESOM
MOSEL VITELIC
MANUFACTURED
Module Part Number Information
V
4
3
74
64
C
2
4
V
X
T
G - XX
SPEED
75PC= PC133 CL2
75 = PC133 CL3
10PC= PC100 CL2
SDRAM
3.3V
WIDTH
DEPTH
168 PIN REGISTERED
DIMM X4 COMPONENT
REFRESH
RATE 8K
LEAD FINISH
G = GOLD
COMPONENT
PACKAGE, T = TSOP
COMPONENT A=0.17um
REV LEVEL B=0.14um
LVTTL
4 BANKS
I/O5–I/O8
10Ω
RQM1
I/O9–I/O12
10Ω
I/O37–I/O40
10Ω
RQM5
I/O41–I/O44
10Ω
I/O45–I/O48
10Ω
RAS
CAS
WE
CKE0
DQM0–DQM7
CB1–CB3
10Ω
RCS2
CB4–CB7
10Ω
R
E
G
I
S
T
E
R
RRAS
RCAS
RWE
D0–D17
D0–D17
D0–D17
R0CKE0, R1CKE0
RDQM0–RDQM7
RC0, RCS2
RA0–RA12
RBA0, RBA1
D0–D17
D0–D17
CS
DQM
I/O1–I/O8 D5
CS
RQM6
I/O49–I/O52
10Ω
CS
DQM
I/O1–I/O8 D14
CS
CS0, CS
A0–A12
BA0, BA1
DQM
I/O1–I/O8 D6
CS
I/O53–I/O56
10Ω
RQM7
I/O57–I/O60
10Ω
DQM
I/O1–I/O8 D15
REGE
CS
V
DD
10K
DQM
I/O1–I/O8 D7
CS
DQM
I/O1–I/O8 D8
DQM
I/O1–I/O8 D16
CS
DQM
I/O1–I/O8 D17
PLL CLK
10K
CLK1–CLK3
12pF
CLK0
10K
PLL
12pF
D0–D17
I/O61–I/O64
10Ω
V437464C24V Rev. 1.0 January 2002
3
V437464C24V
written into the E
2
PROM device during module pro-
duction using a serial presence detect protocol (I
2
C
synchronous 2-wire bus)
A serial presence detect storage device –
2
PROM – is assembled onto the module. Informa-
E
tion about the module configuration, speed, etc. is
CILETIV LESOM
SPD-Table
0
1
2
3
4
Memory Type
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
CS Latencies
WE Latencies
24
25
26
27
Serial Presence Detect Information
Byte Num-
ber
Function Described
Number of SPD bytes
Total bytes in Serial PD
Hex Value
SPD Entry Value
128
256
SDRAM
13
11
-75PC
80
08
04
0D
0B
-75
80
08
04
0D
0B
-10PC
80
08
04
0D
0B
Number of Row Addresses (without BS bits)
Number of Column Addresses (for x4
SDRAM)
Number of DIMM Banks
Module Data Width
Module Data Width (continued)
Module Interface Levels
SDRAM Cycle Time at CL=3
SDRAM Access Time from Clock at CL=3
Dimm Config (Error Det/Corr.)
Refresh Rate/Type
SDRAM width, Primary
Error Checking SDRAM Data Width
Minimum Clock Delay from Back to Back
Random Column Address
Burst Length Supported
Number of SDRAM Banks
Supported CAS Latencies
1
72
0
LVTTL
7.5 ns/10.0 ns
5.4 ns/6.0 ns
ECC
Self-Refresh, 7.8µs
x4
n/a / x4
t
ccd
= 1 CLK
1, 2, 4, 8
4
CL = 2/3
CS Latency = 0
WL = 0
Registered/Buffered
Vcc tol ± 10%
7.5ns/10.0ns
01
48
00
01
75
54
02
82
04
04
01
01
48
00
01
75
54
02
82
04
04
01
01
48
00
01
A0
60
02
82
04
04
01
0F
04
06
01
01
1F
0E
75
0F
04
06
01
01
1F
0E
A0
0F
04
06
01
01
1F
0E
A0
SDRAM DIMM Module Attributes
SDRAM Device Attributes: General
Minimum Clock Cycle Time at CAS Latency
=2
Maximum Data Access Time from Clock for
CL = 2
Minimum Clock Cycle Time at CL = 1
Maximum Data Access Time from Clock at
CL = 1
Minimum Row Precharge Time
5.4ns/6.0ns
54
54
60
Not Supported
Not Supported
00
00
00
00
00
00
15 ns/20 ns
0F
14
14
V437464C24V Rev. 1.0 January 2002
4
V437464C24V
CILETIV LESOM
SPD-Table
Byte Num-
ber
Function Described
28
Minimum Row Active to Row Active Delay
t
RRD
Minimum RAS to CAS Delay t
RCD
Minimum RAS Pulse Width t
RAS
Module Bank Density (Per Bank)
SDRAM Input Setup Time
SDRAM Input Hold Time
SDRAM Data Input Setup Time
SDRAM Data Input Hold Time
Superset Information (May be used in Fu-
ture)
SPD Revision
Checksum for Bytes 0 - 62
Manufacturer’s JEDEC ID Code
Manufacturer’s JEDEC ID Code (cont.)
Manufacturing Location
Module Part Number (ASCII)
PCB Identification Code
Assembly Manufacturing Date (Year)
Assembly Manufacturing Date (Week)
Assembly Serial Number
Reserved
Intel Specification for Frequency
Supported Frequency
Unused Storage Location
00
00
00
64
00
64
Mosel Vitelic
Revision 2/1.2
Hex Value
SPD Entry Value
14 ns/15 ns/16 ns
-75PC
0E
-75
0F
-10PC
10
29
30
31
32
33
34
35
62-61
15 ns/20 ns
42 ns/45 ns
512 MByte
1.5 ns/2.0 ns
0.8 ns/1.0 ns
1.5 ns/2.0 ns
0.8 ns/1.0 ns
0F
2A
80
15
08
15
08
00
14
2D
80
15
08
15
08
00
14
2D
80
20
10
20
10
00
62
63
64
65-71
72
73-90
91-92
93
94
95-98
99-125
126
127
128+
02
67
40
00
02
AE
40
00
12
1A
40
00
00
64
00
V437464C24V Rev. 1.0 January 2002
5
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参数对比
与V437464C24VBTG-10PC相近的元器件有:V437464C24VBTG-75、V437464C24VBTG-75PC、V437464C24VATG-75、V437464C24VATG-10PC、V437464C24VATG-75PC。描述及对比如下:
型号 V437464C24VBTG-10PC V437464C24VBTG-75 V437464C24VBTG-75PC V437464C24VATG-75 V437464C24VATG-10PC V437464C24VATG-75PC
描述 Synchronous DRAM Module, 64MX72, 6ns, CMOS, DIMM-168 Synchronous DRAM Module, 64MX72, 5.4ns, CMOS, DIMM-168 Synchronous DRAM Module, 64MX72, 5.4ns, CMOS, DIMM-168 Synchronous DRAM Module, 64MX72, 5.4ns, CMOS, DIMM-168 Synchronous DRAM Module, 64MX72, 6ns, CMOS, DIMM-168 Synchronous DRAM Module, 64MX72, 5.4ns, CMOS, DIMM-168
厂商名称 Mosel Vitelic Corporation ( MVC ) Mosel Vitelic Corporation ( MVC ) Mosel Vitelic Corporation ( MVC ) Mosel Vitelic Corporation ( MVC ) Mosel Vitelic Corporation ( MVC ) Mosel Vitelic Corporation ( MVC )
零件包装代码 DIMM DIMM DIMM DIMM DIMM DIMM
包装说明 DIMM, DIMM168 DIMM, DIMM168 DIMM, DIMM168 DIMM, DIMM168 DIMM, DIMM168 DIMM, DIMM168
针数 168 168 168 168 168 168
Reach Compliance Code unknown unknown unknown unknown unknown unknown
ECCN代码 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
访问模式 SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST
最长访问时间 6 ns 5.4 ns 5.4 ns 5.4 ns 6 ns 5.4 ns
其他特性 AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
最大时钟频率 (fCLK) 100 MHz 133 MHz 133 MHz 133 MHz 100 MHz 133 MHz
I/O 类型 COMMON COMMON COMMON COMMON COMMON COMMON
JESD-30 代码 R-XDMA-N168 R-XDMA-N168 R-XDMA-N168 R-XDMA-N168 R-XDMA-N168 R-XDMA-N168
内存密度 4831838208 bit 4831838208 bit 4831838208 bit 4831838208 bit 4831838208 bit 4831838208 bit
内存集成电路类型 SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE
内存宽度 72 72 72 72 72 72
功能数量 1 1 1 1 1 1
端口数量 1 1 1 1 1 1
端子数量 168 168 168 168 168 168
字数 67108864 words 67108864 words 67108864 words 67108864 words 67108864 words 67108864 words
字数代码 64000000 64000000 64000000 64000000 64000000 64000000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
组织 64MX72 64MX72 64MX72 64MX72 64MX72 64MX72
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
封装主体材料 UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
封装代码 DIMM DIMM DIMM DIMM DIMM DIMM
封装等效代码 DIMM168 DIMM168 DIMM168 DIMM168 DIMM168 DIMM168
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
电源 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
刷新周期 8192 8192 8192 8192 8192 8192
自我刷新 YES YES YES YES YES YES
最大待机电流 0.036 A 0.036 A 0.036 A 0.036 A 0.036 A 0.036 A
最大压摆率 3.96 mA 4.3 mA 4.3 mA 4.3 mA 3.96 mA 4.3 mA
最大供电电压 (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) 3 V 3 V 3 V 3 V 3 V 3 V
标称供电电压 (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
表面贴装 NO NO NO NO NO NO
技术 CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
端子形式 NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD
端子节距 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm
端子位置 DUAL DUAL DUAL DUAL DUAL DUAL
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器件捷径:
E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ
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